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Resolved! ADC1, ADC2 dual mode with differential input

ADC1 and ADC2 run in interleaved dual mode using DMA. Resolution for both ADCs is set to 8-bit. ADC1 is sampling CH1 and CH2 in differential mode. The results that I get from DMA are a bit strange: If my positive input is ~1.65V, if my negative input...

graph_adc.png table.png
CyberNerd by Associate III
  • 122 Views
  • 2 replies
  • 1 kudos

Phase shift with swapping polarity

HiI am working on a STM32G484QET6 uC. On a timer I have configured two output channels with Output Compare Toggle Mode. So that I get a quadrature signal.When configuring the first value, everything works perfectly. The duty cycle is 50% and the phas...

RLD by Associate II
  • 308 Views
  • 5 replies
  • 1 kudos

BKIN Input to shutdown PWM for motor

Hi, i have configured BKIN pin to detect fault for my overcurrentSo for my motor driver if this pin sense BKIN input. How much time it be will taken by my microcontroller to sense and to act to shutdown my PWM gate signalsIs it hardware glued logic t...

sag_0-1723450589668.png
sag by Associate III
  • 253 Views
  • 7 replies
  • 0 kudos

Resolved! Possible to disable external reset on STM32G4?

I am aware of the special bits to stop the IWDG and WWDG while the core is halted, but is there a way (option byte, SWD command, SFR, etc.) to configure an STM32G4 so that it will ignore the nRST pin being pulled low? I am particularly interested in ...

jacobq by Associate II
  • 180 Views
  • 3 replies
  • 2 kudos

Getting stuck at memory address 0x1fff'5064 on boot.

I have a couple dozen of custom boards with STM32G4s on them. These boards are all 'identical' and the software being loaded on them is the same. BOOT0 pin is currently floating so on my initial load I held it to ground and changed the option bytes v...

JVoge.2 by Associate II
  • 1500 Views
  • 7 replies
  • 1 kudos
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