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I am aware of the special bits to stop the IWDG and WWDG while the core is halted, but is there a way (option byte, SWD command, SFR, etc.) to configure an STM32G4 so that it will ignore the nRST pin being pulled low? I am particularly interested in ...
I was looking at some slides that I found called STM32H7- CORDIC co-processor (CORDIC, Revision 1.0) and noticed the following on slide 6: According to this, the fractional number being represented by the fixed-point integer bits is (-1)^s multiplied...
I am developing some applications that use an STM32G431 MCU and have a question about one of the figures in the reference manual (RM0440). In the chapter descripting the FDCAN peripheral, Figure 664 "FDCAN block diagram" (MSv51819V2) labels the FDCAN...
I am using STM32CubeIDE (v1.15.1) to develop firmware for an STM32G431 MCU and attempting to configureTIM8 to use dithering. I have defined the following constants:TIM8_KHZ = 20TIM8_PRESCALER = (1-1) = 0TIM8_PERIOD = (((16*170000/TIM8_KHZ)/2)/(TIM8_P...