HiAssume that i set up an H-bridge and and control it via the HRTIM block and use the build in deadtime features. I then also enable a couple of faults. The bridges safe state will be to set both lower transistors to be OFF and the two upper once to ...
用于STM32AI的神经网络工具 v1.7.0(STM.ai v8.0.0-19389)内部错误:列表索引超出范围这是一个使用 pytorch 创建和转换的模型模型是否太大?
I use the STM32F103C4 and STM32F030F4 chip. I design a card with these chips. How I can programmable these chips? If I add SWDIO, SWCLK, +3.3V, and GND pins to the card as a male header, Can I connect the ST-LINK v3 to these pins and program it direc...
Using STM32L451CET6 and threadx I created multiple task and was running into hard fault on debugging found that from my 70KB byte pool when i created a task more than 27Kb it was running into hard fault again the usable memory is 160Kb out of which a...
Hello, I'm changing the DDR3 size from 512MB to 1GB on the STM32MP135F-DK board. The modifications were done as below. After that, I met the OPTEE header parse error. Compilation and updating software on board was conducted according to the ST wiki...
I often use Motor Profiler to identify motors.But it is not good.Sometimes my motor cannot be recognized when using 48V and I have to reduce the supply voltage to 36V.Here I would like to ask whether it will be open sourced. I want to understand the ...
Hi,I am using STM32G491RE. I have to read temperature values from ADC. We used voltage divider circuit to map the voltage values with temperature values it is non linear change between volatge and temperature.I tried below wayconst uint16_t adc_valu...
I use IIS3DWB with no LPF2 enabled, and I understand the Frequency response shown in Figure 13 at page 20 of the datasheet.I know that I can enable low-pass LPF2 filter, but from the same graph I don't understand if this filter can be enabled as a ha...
Hi there,We use a STM32F723 controller and want to connect two external RAM devices.Now we have to select a RAM that fits to the FMC. What we can't find in the reference manual RM0431 is if SDRAM-DDR functionality is provided or only SDRAM without DD...
Which device registers are accessible through the ASC feature?
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