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Overwrite 4 Bytes at given location in Hex file

Write 4 Bytes at given location in Hex file (Flash segment)I tried this:const uint32_t __attribute__ ((section(".checksumdata"), used)) CodeChecksum = 0x12345678; But when I build code, It doesn't changes only ".checksumdata", but also other intermit...

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Jayant by Associate
  • 117 Views
  • 5 replies
  • 1 kudos

Resolved! G431RB 32 Bit Timer

I am attempting to set up an encoder on STM32G431RB using Tim 2 which is 32bit but it is only counting up to a 16bit value and going negative. I looked at the register through SFR and only the first 16 bits are active, is there another setting I need...

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STM32G431 Comparator BUG

Hi,Few days ago i've encountered a strange behavior of the comparator at STM32G4. I investigated the problem under controlled conditions (used Nuclo kit instead application PCB) and the result is startling.Comparator 4 configured to get positive inpu...

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Timers for Hall Sensor

Hi as i want to use hall sensor interface to my input pwm capture We can see these timers associated with digital hall,Which one i can choose TIM1/8/20 or TIM2/3/4/5 also suggest on 16 bit and 32 bit timer preference.   Also can it be preferable to u...

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sag by Associate III
  • 106 Views
  • 4 replies
  • 0 kudos

STM32G473 BFB2 Not Working

BFB2 Set, but never enter Bank2 program.Boot0 = 0Boot1 = 1I can run the 2 programs from cubeide in there respective locations and ISR work when BFB2 is set for the BANK I am debugging in. However I never enter BANK2 program on resetting/powercycling ...

kip18 by Associate II
  • 386 Views
  • 4 replies
  • 0 kudos

STM32G4 DAC output HAL+LL naming

Hi,HAL and LL DAC configuration structure and its parameters naming can be confusing. Reference manual claims that DAC "mode" (register ADC->MCR, bits 0..2 or 16..17) can be in one of following four combinations when not used sample and hold mode: 0 ...

Resolved! STM32G4 dithering + DMAR + 16bit access

There is glitch when accessing timer registers using DMA- Halfword memory to halfword peripheral DMA transfer- DMA target is TIM15->DMAR, configured to write ARR register.- TIM15 dithering enabledUnder these conditions, bits from ARR[3:0] will end up...

ledvinap by Associate
  • 211 Views
  • 6 replies
  • 2 kudos

PWM pin configuration for high low STM32G4 Series

Hi,if i want to use PWM out for my motor driver inverter complement of each other.Can i configure , HRTIM1_CHB1 for High & HRTIM1_CHB2 will be its complement Low.For motor driver as i need total 6 pwm channels.So in short HRTIM1_CHB1 for High & HRTIM...

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sag by Associate III
  • 55 Views
  • 0 replies
  • 0 kudos
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