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Is it possible to use pb8 (boot0) as I2C1 SCL pin, it seems STM32CubeIDE let's me configure it that way. But how can I prevent issues with the boot function after reset? Since I2C is pull-up level, right?
My configuration is that I use TIM2 CH1 to capture the time between COMP4 edges. This works ok. Now I would like to use TIM3 to generate some ISRs on several channels, I would like to let TIM3 to reset based on TIM2 capture ch1. I set TIM2 TRGO to "u...
Is there a way to connect TIM4 to TIM1 were I will be able to slightly phase shift the PWM signal generated by TIM4 compared to TIM1? TIM1 will be configured as master, TIM4 will be configured as slave.
ADC1 and ADC2 run in interleaved dual mode using DMA. Resolution for both ADCs is set to 8-bit. ADC1 is sampling CH1 and CH2 in differential mode. The results that I get from DMA are a bit strange: If my positive input is ~1.65V, if my negative input...
Currently I'm able to run ADC1 and ADC2 in interleaved mode using seperate (on purpose) DMA channels for ADC1 and ADC2. To start I'm using:  SET_BIT(hadc2.Instance->CFGR, ADC_CFGR_DMAEN); //Enable DMA transfer for ADC slave (ADC12_CCR.MDMA = 0b00 -> ...
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