Hello! I'm using USART with DMA and when I disconnect the Rx cable, sometimes the communication resumes and sometimes not. How can I always recover USART Rx?I tries reseting it with RCC using the line: RCC->APB2RSTR ^= RCC_APB2RSTR_USART1RST; // USAR...
[This is a reconstruction of a thread I've started on Apr 7, 2017, but got lost in the two forum software transitions since then.]In STM32F40x and STM32F41x Errata sheet DocID022183 Rev 8, 2.1.13 Delay after an RCC peripheral clock enabling, there ...
I have a STM32F405 with a coin cell on VBAT and I haven't been able to get the Backup SRAM or RTC to preserve contents when removing main power. The same code works fine on another board that has a STM32F407. //Works on STM32F407 - Fails on STM32F40...
Hi,I am using B-L475E-IOT01A. I am wondering that MSI can be changed on the fly when it used as system clock source.In `HAL_RCC_OscConfig` from STM32L4Cube drivers code, it looks like ok. But I didn't find any relative information from l47xxx manual....
Hey there,I am facing a problem with the clocks on the STM32H755ZI. When I let a timer run at 50 kHz I get only smt. like 49.92 kHz out of it with sigma = 13 Hz. So there is at any frequency a steady offset of -1.2% and a sigma deviation of 0.03%. I ...
I'm a bit confused about the necessity of clocking the SWD ports using STM32G0B1 chip.There is a I/O port clock enable register (RCC_IOPENR) that enables the functioning of each of the GPIO ports (Port A - Port F), its reset state is all zeroes, so n...
Hello, I have a simple question: What is the way to update the SysTick configuration after changing the clocks at runtime? I am switching SYSCLK between two modes:1) RUN mode: HSE 32 MHZ2) LPRUN mode: MSI 2 MHZAfter changing to (2), the HAL_GetTick()...
To use a clock to drive the RF unit of the STM32WB55, here are 2 options in the BLE_p2pServer demo code, LSE and HSE divided by 1024,I want to know if it is available to use LSI or HSI as the clock source of RF unit in it, thank you.
I'm trying to develop a bootloader for a dual core STM32H7, running on the CM7. I'm starting by trying to modify my user project for it.I've moved the user code up a bank:FLASH (rx) : ORIGIN = 0x08020000, LENGTH = 896K and put in a IVT offset on ...
Hi,a footnote(4) in STM32H7 reference manual RM0468 Table 56 regarding the maximum allowed frequency for ADC says"With a duty cycle close to 50%, meaning that DIV[P/Q/R]x values shall be even".Does this recommendation apply to the actual DIVXx regist...