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Bootloader DFU on STM32F439ZITx

Hi everyone, I'm developing a bootloader that works like this. I was inspired by the example: https://github.com/pramodk51/bootloader_for_stm32f4.  I developed this initially on Nucleo F439ZI for the test phase and I managed to implement it with the ...

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Resolved! STM32U585 IWDG Early Wakeup Interrupt and Stop modes

The manual I have for the STM32U585 describes the Independent Watchdog (IWDG) peripheral and says it has an Early Wake-Up Interrupt (EWI) feature.  The manual says "Wake-up from Stop with interrupt is supported only in Stop 0, Stop 1, and Stop 2 mode...

BDoon.1 by Associate III
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the circuit of STM32F429 NRST

Hi all,I'm using STM32F429BIT6。my question is: C3 is 3.3uF±10%,How do you like this circuit?When WDG reset in the MCU  STM32F429BIT6,It will lead to CMOS failure of the MCU NRST?If C3 is 2.2uF±10%,the CMOS of the MCU NRST will be OK?Thanks!NRST Circu...

NRST 3.3uF.jpg wdg Reset.png

STM32G030 erratum 2.2.1 workaround is not reliable

Erratum 2.2.1 (Unstable LSI when it clocks RTC or CSS on LSE) indicates the following workaround:If LSI clocks the RTC or when the LSECSSON bit is set, reset the backup domain upon each VDD power up(when the BORRSTF flag is set). If VBAT is separate ...

DAlbe.3 by Senior
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LSI frequency range for STM32F303CC

Posted on February 13, 2018 at 13:16The current data sheet for the STM32F303CC (DocID023353 Rev13) shows on page 80 the characteristics of the LSI oscillator.Its frequency starts from min. 30kHz to typical 40 and max. 50 kHz (all at 3.3V in the max....

STM32G051G6U6 IWDG not refreshing

Hi,I am facing an issue with IWDG in  STM32G051G6U6.HAL_IWDG_Refresh(&hiwdg);  not refreshing IWDG and  the core resets after IWDG overflow time.IWDG overflow is set at 13Sec (varying wrt prescaler) and I am refreshing it at every 1 sec.Counter presc...

STM32H743 IWDG Standby

Hi,I have been banging my head for a while now and decided to reach out for help. I am trying to get the IWDG to freeze during Standby. Based off the reference manual I have toggled the IWDG_FZ_SDBY bit to 0. In STM32CubeProgrammer it is set to 0 so ...

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