STM32 MCUs Products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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Resolved! Voltage divider for ADC input?

OK, this is perhaps a fairly stupid question but I do not get it.I have an analogue voltage in range -5V..+5V and wantto measure it with the ADC of an STM32F446. The ADC-input works in range 0..3.3V.I have the feeling I can do that with a simple, res...

BSchm.6 by Associate III
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  • 3 replies
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FMC: How to delay chip select?

I should combine STM32F479 with PROFIBUS-DP ASIC SCP4-2 The chip is aged. And requires delay of at least 30ns (by 3v3) between address and cs. Our previous design was based on SAM4S and their CPUs are offerring register to program such delays. In STM...

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AlexKern by Associate II
  • 1590 Views
  • 4 replies
  • 1 kudos

STM32G4 Reset Issue

I am having some strange power up (I think) issue with my STM32G431 controller.  Sometimes it runs for a second or two, sometimes nothing.  It will usually not connect via the SWDIO pins so it is difficult to step through in debug to see where the pr...

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Resolved! UART Receive code is not working.

I am using STM32F103C8 MCU and Trying to communicate with Quectel EC200U-CN 4G module and i am not getting data through UART2 Receive pin. Please go through my code and suggest mevoid USART2_IRQHandler(void){ if ((USART2->SR & USART_SR_RXNE) != RESE...

Siva Ram by Associate II
  • 1218 Views
  • 5 replies
  • 1 kudos

PowerSTEP01 example code and programmer user guide

Hi, i m trying to program PowerStep01 with SPI on STM32H7, can anyone kindly advise where to locate sample code and tutoral ? or programmer user guide?  A serach online yield this but error on page and file not found. https://my.st.com/content/my_st_...

Resolved! USB on-the-go high-speed (OTG_HS) - core setup confusion

In RM0456 section 73.4.3 OTG_HS core (p.3279) I found the following statement:"The OTG_HS receives the 60 MHz clock from the reset and clock controller (RCC). This is typically generated in the PLL associated with the HS PHY and enabled in the RCC. T...

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TDJ by Senior III
  • 11007 Views
  • 5 replies
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What lead times and deliveries are you seeing?

Sorry to bring up the elephant in the room. I just reviewed the ST Q1 quarterly results from April and was astonished to not find anything related to lead times, shortages, or allocations.My company is in the Musical Instrument space. We work with a ...

AHigg by Associate II
  • 1479 Views
  • 7 replies
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