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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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Using CYCCNT in STM32G491RE

Hi every oneI want to use DWT->CYCCNT in my software for STM32G491RE. I used these 2 lines to enable it:CoreDebug->DEMCR |= CoreDebug_DEMCR_TRCENA_Msk; DWT->CTRL |= DWT_CTRL_CYCCNTENA_Msk; But when I see with the debugger it seems that it does not wr...

Resolved! Problem with TIM1 overflow interrupt for STM32G0

Hello,I'm studing timer, and I wanna raise an interrupt every second using the Timer1.I write this code in main:rcc->APBENR2 |= RCC_APBENR2_TIM1EN_Msk; //Enable Timer1 clocktimer->CNT = 0;timer->ARR = 1000;// up to 1000timer->PSC |= 16000 - 1;//actua...

dmrsim by Associate III
  • 854 Views
  • 3 replies
  • 2 kudos

Resolved! There is UART BUG on STM32F446RCT6

STM32CUBEIDE:  version 1.14.1PA0-WKUP ------> UART4_TXPA1 ------> UART4_RXOn a new project when enabling the UART4 with interrupt on receive ,everything is working normal .But once I enable PH1 pin as a GPIO_OUTPUT the UART is not transmitting or rec...

Mugtaba by Associate II
  • 1206 Views
  • 7 replies
  • 4 kudos

Resolved! STM32H7 Input Capture Measurement Offset

I am am trying to assess the accuracy of the input capture measurements by capturing a stable periodic pulse, setting the output compare on another channel of the same timer to the measurement, and then measuring the offset on a scope. It appears the...

Tkmn by Associate II
  • 3951 Views
  • 14 replies
  • 6 kudos

DMAMUX transition latency

Hello,I am using DMAMUX(dm) chaining, that means there are n dm channels and the previous is generating an event for the next dm channel as a sync input. I noticed that there is a latency in the transition of one dm channel to the next one. For examp...

Nucleo-H743ZI2 SPI bus configuration

If I want my SPI bus to have the CLOCK line high already before the active-low CHIP_SELECT (ENABLE/) line goes low, is there a way to do that?I'm driving an AD9833 chip which requires at least 5 nsec time after CLOCK high, before ENABLE/ goes low. Lo...

JBeal.1 by Associate II
  • 456 Views
  • 2 replies
  • 1 kudos

Resolved! STM32CUBEU5: USB conflicts with user ADC1 use

When I use STM32Uxx boards with USB device and STM32CubeU5 drivers/libraries - I cannot make use of ADC1.I want to use ADC1 also (not just USB), to measure VCORE and Temperature.It is a SW issue (and it can be fixed), not a HW issue.Details:I use STM...

STM32L0 ADC "Latches" Data Using DMA

Hello,I am using an STM32L031G6U6 device. (28-UQFN)Summary: There are 6 ADC channels configured for DMA. After having a nominal voltage (2.9V or less) applied to Channel 0 / ADC_IN0 / Pin 6, and then removing the source, the value remains in the regi...

roger99 by Associate III
  • 638 Views
  • 3 replies
  • 0 kudos