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Hi, I'm trying to communicate two microcontrollers (STM32H503CBT6 and a NUCLEO-H503RB) via FDCAN but the STM32H503CBT6 is not sending any messages.Both have the same configuration, but the NUCLEO-H503RB can send (I have checked it with an oscilloscop...
Split from this thread. thanks to @Ozone @Karl Yamashita, this afternoon I have tried to extend can2.0 to canfd with my project of stm32g474vet6. I found some strange things, I think there may be a bug of stm32g474vet6 fdcan module. I modifed the FD...
HelloI am using NUCLEO-G474RE board to sample voltages from the the Battery management board. In the PCB board, I have opamp voltage divider to step down voltages around 24Volts to 2.5V level to be read from the STM. Please refer to the voltage divid...
Hello,The target MCU is STM32L151ZETx (LQFP144), and the main clock frequency is 32 MHz.Normally, the system operates in Run mode, but I plan to use Sleep mode or Low Power Sleep mode when the supply current decreases.My question is: when entering Sl...
Target MCU: STM32L151ZETx (LQFP144)Main Clock Frequency: 32 MHz When the MCU is first powered on, it takes about 41 ms to reach the while(1) loop in the main() function, based on the code shown below. For my product requirements, I would like this st...
I tested the LSE CSS function on the Nucleo-L053, but I found that short-circuiting the crystal oscillator pins failed to trigger the CSS interrupt. The code configuration is as follows plz give a clue or the flow of LSECSSvoid SystemClock_Config(voi...
The Reference Manual for L4 series (RM0394) says on page 1007:"When the LPTIM is running with an asynchronous clock, reading the LPTIM_CNT register mayreturn unreliable values. So in this case it is necessary to perform two consecutive read accesses ...
I'm experiencing FDCAN Memory Access Failures on the STM32H503KBUX during CAN Rx. I am also experiencing intermittent CAN Rx message drops (every 1 in a 200), and I believe the two are related since no others errors are firing. I know the drops are h...
Hello,Is it possible that STM32f207ZGT6 purchased in 2025 from an official distributor have an old silicon revisionrev_id = 0x200f?
I am having a problem reading SPI data on an STM32F407 where it always returns 0x00. I actually have this working using HAL on the same hardware, however for legacy reasons I need to get this working with SPL. This application is just sending clock s...
