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STM32G473 via SPI I have most of the other commands working, but the Get Checksum command (0xA1) fails to return an ACK when I send the CRC init value. I am using the default CRC configuration:#define DEFAULT_CRC32_POLY 0x04C11DB7U#define DEFAULT_CRC...
Hello everybody,in our application, we want to avoid using the ADC software calibration procedure (not even once).We hence think about writing a fixed value to the Calibration register CALFACT as we saw that most of the times the calib value is very ...
In the RM for the H743 there is little information about using IO cell compensation aimed at reducing noise on VDD and EMI radiated.Posts show the following calls to active:-__HAL_RCC_CSI_ENABLE();__HAL_RCC_SYSCFG_CLK_ENABLE();HAL_EnableCompensationC...
Hi, I am evaluating the STM32H7R7Z8J6, intended to working with a TFT-LCD which is working in parallel RGB interface with DE mode only. The HSYNC and VSYNC signals are not connected. Both AN4861 (Introduction to LCD-TFT display controller (LTDC) on S...
Hi everyone,I am working on an STM32H7A3ZI and I'm trying to to exchange audio data with an SGTL5000 audio codec. Because i want to both send and receive data from the codec i configured the I2S peripheral on the STM32 to Full-Duplex Master mode in C...
Hi all! AGENDA: Need to verify the external QSPI flash (AT25Q128A) all sectors Write, Read and Comparing with STM32L496ZG-P using driver code. APPROACH: For write, I am have created a buffer which comprises of page size of 256, and I am using two "fo...
I have a problem I can't solve.In a previous project, I used an STM32L4A6 and set the PC8 and PC9 lines high before entering the system bootloader. After starting the system bootloader, these lines remained high. They were used to maintain power to t...
Apologies if this is the wrong group for this query. I have implemented a library from scratch which performs the host side of a DFU upgrade (avoids the dependencies in CubeProgrammer_API.dll, for which I could not find source). The code works just f...
Hello everyone,I’m facing an issue with an STM32L4-based design where the USB FS Device stack (CDC) sporadically fails to start correctly. Maybe someone has seen similar behavior or can point me to potential root causes. System overview / setupMCU: S...
I am having trouble connecting to the STM32N6 with SWD.I have implemented a design using the STM32N645X0H3Q (though I have placed the STM32N647X0H3Q) using external VDDCORE. R110 is not mounted (to set VLXSMPS to NC).On startup I have VDDIO (3.3V) an...
