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Increase Rx FIFO0 and FIFO1

MAmem.1
Associate III

Hi,

I'm using the FDCAN2 of the STM32G474VET6 for a project and I need to reshape the RAM Message memory in order to adapt it to the FDCAN Classic.

Actually the configuration of the RAM Message, by default, is written for FDCAN.

So I have the following configuration:

#define SRAMCAN_FLS_NBR   (28U)        /* Max. Filter List Standard Number     */

#define SRAMCAN_FLE_NBR   ( 8U)        /* Max. Filter List Extended Number     */

#define SRAMCAN_RF0_NBR   ( 3U)        /* RX FIFO 0 Elements Number            */

#define SRAMCAN_RF1_NBR   ( 3U)        /* RX FIFO 1 Elements Number            */

#define SRAMCAN_TEF_NBR   ( 3U)        /* TX Event FIFO Elements Number        */

#define SRAMCAN_TFQ_NBR   ( 3U)        /* TX FIFO/Queue Elements Number        */

#define SRAMCAN_FLS_SIZE   ( 1U * 4U)    /* Filter Standard Element Size in bytes */

#define SRAMCAN_FLE_SIZE   ( 2U * 4U)    /* Filter Extended Element Size in bytes */

#define SRAMCAN_RF0_SIZE   (18U * 4U)   /* RX FIFO 0 Elements Size in bytes     */

#define SRAMCAN_RF1_SIZE    (18U * 4U)   /*RX FIFO 1 Elements Size in bytes     */

#define SRAMCAN_TEF_SIZE    ( 2U * 4U)    /* TX Event FIFO Elements Size in bytes */

#define SRAMCAN_TFQ_SIZE     (18U * 4U)   /* TX FIFO/Queue Elements Size in bytes */

I need to shorten the element size in FIFO and increase the number of elements.

How is it possible ?

I tried different configurations but no success.

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