STM32 MCUs Products

cancel
Showing results for 
Search instead for 
Did you mean: 

Forum Posts

New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

gif-stm32u0.gif

STM32U5[Ax] Usb Host Multi-Packet Data Toggling

Hi all, I am not able to fully understand how the DATA0/DATA1 toggling works when performing multi-packets transmissions. For "multi-packet" transmission I mean that the "num_packets" in USB_OTG_HCTSIZ_PKTCNT register is greater than 1, (i.e. I want ...

bluluiss by Associate II
  • 579 Views
  • 3 replies
  • 0 kudos

STM32H723VET6 Ethernet doesnt work

As the subject states I am trying to get Ethernet work on the VET6 Microcontroller. I have tried to configure my microcontroller like the Ethernet example project provided on Github for the STM32H723GT. I have tried the exact code on the H723GT Nucle...

EH by Associate
  • 696 Views
  • 3 replies
  • 0 kudos

Resolved! Automatically entering and exiting bootloader

Is there a way to make STM32Cube Programmer controls a pair of pins in a CH340 or similar USB to TTL converter, to be able to control BOOT0 and NRST pins of an StM32 micro? I would like to make  a simple circuit that permits entering and exiting a bo...

Castelo by Associate II
  • 527 Views
  • 1 replies
  • 1 kudos

Resolved! STM32H7A3 I2C_CR1 bit NOSTRETCH settings

Currently try to configurate settings for register I2C_CRI. Not sure which value should I set for bit NOSTRETCH. I am using I2C as master. This bit only effected when using I2C as slave. But in manual mention must kept cleared in master mode.  Meanin...

NRAML.1 by Associate II
  • 476 Views
  • 2 replies
  • 0 kudos

Resolved! High current draw Vbat Bluepill

Hi,This is the first time I am starting a post, sorry in advance if it's not in the correct place.I have a Blue-Pill with original STM32F103C8T6. I have Vbat hooked up to a 0.33 F super cap via 100 ohm. Vdd is connected to V bat with a BAT54C Schottk...

NLHL by Associate
  • 1748 Views
  • 5 replies
  • 3 kudos

MDMA Block transfer only transfers one block

Hi all, i am trying to use MDMA to transfer data from a cyclic ADC-DMA buffermy ADC buffer is of x size and it is cyclic: adc_buffer[x]and i want to transfer its data via MDMA to a larger buffer while its samplingmeaning that after every ADC iteratio...

shahaf321_0-1708006211819.png shahaf321_1-1708006643985.png
shahaf321 by Associate III
  • 334 Views
  • 0 replies
  • 0 kudos

Resolved! How to use SD card and eMMC together in STM32H7

안녕.최근에 STM32H753XI를 사용하여 맞춤형 보드를 만들었습니다.보드의 초기 테스트를 위해 각 주변 장치에 대한 테스트를 실행하고 있습니다. 대부분의 경우 잘 작동하지만 SD 및 eMMC 사용에 문제가 있습니다.내 보드에는 SD 슬롯 1개와 eMMC가 포함되어 있습니다.eMMC는 SDMMC1에 연결되고 SD는 SDMMC2에 연결됩니다.그리고 둘 다 FatFS에 연결하여 파일 시스템으로 사용합니다.둘 다 각각 사용할 때 매우 잘 작동합니다...

SDIO_sch.png eMMC_sch.png CORETEX_M7.png NVIC.png

Resolved! Target H723 with IAR EW for ARM 8.50.x

Hi, I would like to migrate a code on STM32F271 to a chip STM32H723 while using IAR EW 8.50.xMy problem is that H723 is not in the target list for  IAR EW 8.50.5I can target H723 with IAR EW 9.20 but in that way I loose compatibility with other softw...

Resolved! Mismatch of DTCM-RAM cache attribute in documentation

In Figure 1 of the reference manual RM0433 for the STM32H743 (and STM32H742, STM32H753, STM32H750) no connection between cache and DTCM-RAM exists.  For all I know this is correct since the DTCM-RAM is not cachable.Table 7 on the other hand shows tha...

dmocom_0-1707908626572.png dmocom_1-1707908975086.png
dmocom by Associate II
  • 1007 Views
  • 4 replies
  • 4 kudos