Hello,can someone please help me,why do when i use SDRAM1 and then add SDRAM2 the data and address pins are the same but only the chip enalbe. does this mean that all pins even the Data pins DQ can be connected parallel for both chips? have someone a...
I try to implement I2C slave so it behaves like a typical EPROM and master can read/write using HAL_I2C_Mem_Read/HAL_I2C_Mem_Write functions.After 3 days of searching and trying I found only one, partially working example: STM32F072 I2C slave Receive...
i'm using STM32F030K6T6 microcontroller GPIO in open drain mode, i use external pull up res. by value 47k to VDD=15v while supply voltage for STM is 3.3v, the reason is that i wanna make a switching signal with 0v and 15v in output pin by the input 0...
Hi. I'm having trouble with integer interpretation for DFSDM. From the RM:> The offset correction allows to calibrate the external sigma-delta modulator offset error. The user configures the offset register with a signed 24-bit correction, and this r...
Hello All,I have an intresting issue that came up. But I am not sure if I understand it. In the clock configurator, I gave the usart mux a 100Mhz clock for the uarts and set up the baud rate for 115200K. Once I started sending data, I noticed that...
I have a very basic 8-bit parallel line on pins PC0-PC7 with its clock on PB6. The MCU is a 411RE, I'm using STM32CubeIDE and HAL libraries.I've read AN4666 but the examples provided are written using an obsolete library, not HAL. But I understood th...
Hi guys,I'm currently working with Standard CAN. The maximum data length of each frame is 64 bytes. In HAL library, I see DLC parameter is limited from 0 to 8. So that means, I can only transmit 8 elements of an array (8 bytes for each element). In o...
My goal is to start ADC conversions a deterministic amount of time after raising a GPIO.Since the ADC clock is slower than the instruction clock, the instruction to set SWSTART can occur in between ADC clock cycles. I currently have the ADC clock set...
I am using stm32f767zi nucleo board and they HSE clock input is coming from st link debugger which according to data sheet of the board generates an 8 MHz MCO signal which is fed into the OSC_in pin. I have configured HSE bypass as the clk source for...
As shown below the screen, when I am running the MCU application, it is running without any flaws. However, when I notice the TraceExceptions window on Keil IDE, noticed a large number of hard faults occurring. But these faults do not trigger fault h...
