Resolved! On STM32U575, RAMCFG_MxCR bit ECCE not set on start up with FLASH_OPTR bit SRAMx_ECC 0 (enabled)
I managed to program the FLASH_OPTR user option bytes and set the SRAM2_ECC to zero (enabled). But when restarting the µC the RAMCFG_M2CR ECCE bit is not set and the RAM ECC is not active. So during startup when the .data section is initialized in SR...