STM32 MCUs Products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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UART and timer interrupt issue

Hello! Can you help me?I'm receiving data in UART Rx with DMA and send it by USB, it works fine. Now i'm trying to set up a timer to check if I'm receiving data every 250[ms] and send a special message. When I don't configure the timer it works, but ...

SGonz.2 by Associate II
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  • 2 replies
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STM32F030 Temperatur Sensor

i tried to use the internal temperatur sensor but its a little bit strangewhen the tempertur goes up the value from the adc goes downis that right or is my config for the adc wrong ?

RSeye.1 by Associate II
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stm32L051 registers don't change

Hello!I'm working on a custom board with an stm32L051 and the HSI16 crystal. I'm setting the clock registers, Flash, PWR and then I try to enable the clock for TIM21. as you can see in the code I set the bit but the computer "doesn't listen"(I am loo...

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EPora.1 by Associate II
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Resolved! About output compare mode of STM32G071RB

I want to perform a timer interrupt using the output comparison mode.When the frequency is set to 2000Hz, ARR : 20, CCR1 : 25, I think that interrupt does not occur because ARR <CCR1, but interrupt occurs. Why do interrupts occur?

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Sodag.1 by Associate II
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  • 3 replies
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we have a EEPROM device ( M24C16, M24C08 ) to record a calibration data for the pump. can someone share with me a scenario of data corruption during the power up mode and operation mode when read/write access is needed

we have experience checksum change ( or data corruption ) anomaly in various stage of production assembly process, this anomaly occurs 1) when we power up the system, we got checksum error, does it mean that the data from default factory setting wa...

jli.3 by Associate
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STM32H7 HAL QSPI delayed clocks

I'm reading data from an FPGA over QSPI. I'm attempting to read 256 bytes at a time. However, when I read the data the QSPI clock decides to take a long pause before continuing. I get an initial burst of 74 clock pulses, then 56 bursts of 8 clock pul...

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