STM32 MCUs Products

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STM32F745 - Disable Watchdog in Sleep mode

Hello,I am using STM32F745VEHx. I would like to disable the software independent watchdog before microcontroller goes into Sleep low power mode and then re-enable it once microcontroller comes out of Sleep. I can find literature which suggests this c...

LJain.1 by Associate II
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  • 1 replies
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STM32F303K8 - Sampling a 40KHz sine-wave

The problemI am to compare the phase shift between two sinewaves from an external source (I used a function generator in this case). I am running the STM32F303K8 at 64MHz, and this clock goes directly to the ADC and Timers 1 and 2 as well with a pres...

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malehakim by Associate III
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  • 3 replies
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Resolved! stm32f334 i2c slave speed

Stm32f334 i2c works in slave mode , select i2c kernel clock 72mhz. datasheet says it's i2c fast-mode+ support up to 1mhz, but I found that it can be accessed stably by a master with scl at 2.5mhz. Is it ok to use a master scl speed faster than...

tri.1 by Associate
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  • 1 replies
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STM32F429 SD card rcvr_datablock time

I have a application with STM32F429ZI and SD card withour RTOS.I have a llong time for write in a SD card.The rcvr_datablock routine is loong about 3 ms between set and reset LED !!!It is possible to reduce this time using rot_rdq without use a RTOS ...

IlConte by Associate III
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Resolved! TM32H573xx + TrustZone activated

Hi guys! I am a newbie in the STM32 world. I am little bit curious about STM32H573xx series's TrustZone feature implementation. My question is: if I develop a firmware by enabling the TrustZone (TZEN=1) and then every time when I will write the file ...

GTest.1 by Associate II
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  • 2 replies
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STM32F373CCT6 2 Channels Single ended wired together for 16 bit ADC interleaved 50 KHz to 100 KHz , Can it be done with 2 Differential channels at same speed 50KHz to 100KHz or is it stuck at 16Khz max speed in differential mode

Device STM32F373CCT648 pin We currently using 2 single ended 16 bit SADC inputs one on SADC1 PE9 and one on SADC2 PB2.We interleave the two 50KHz single channels using a 10uS delay between them. This uses DMA SADC transfer an interleaves the signal t...