SOLVED: I didn't convert the flashErase_handle.PageAddress to hex, so I was passing in the integer 800_8000, which is much less than 0x800_8000I'm using the Nucleo F303RE board and as part of a bootloader trying to erase pages of flash containing th...
I am using the following slave device for I3C reading and writing. I can now read and write CMOS registers through private mode, but I cannot find any examples of entering and exiting HDR mode. Can you provide an example program for entering and exit...
Hi, I have a STM32H745 MCU, which has both M7 core and M4 core. I created a project in CubeIDE, and the code that is automatically generated expects both processors to be active.Indeed, in the code of the main. of core M7, wait for core M4 to boot be...
Hello.I'm trying to make an I3C Master device using the NUCLEO-H503 board.I am trying to implement GPIO by directly controlling, without using HAL Library.However, I3C port uses both Open Drain and Push pull,Is it possible to implement this function ...
Behaviour of WWDG on STM32L071KZUx.We are trying to read and write 256bytes from the Slave. In a specific case the Slave needs delay of 120ms to process the data when we add 120ms of delay in the MCU, the void HAL_WWDG_EarlyWakeupCallback(WWDG_Handle...
I just want to know about using SPI CS alternate function or a simple GPIO output. In my design I just have a pin with no SPI CS alternate function available, so could I use it as a simple GPIO output?
Hi AllWe are testing the STM32U585 Smart Card mode with clock and trying to connect with external SAM module. We are able to get the USART-ISO7816 frame format from the controller but we are unable to capture the ATR value from the module in a correc...
I've been trying to get TIM2 PWM (or even OC) to produce an output. When looking at the registers, using openocd w telnet, I find that setting 0x40000000 (the CR1 register) with 0x81 also sets the 0x4000004C (the DMAR) register. The reverse is the sa...
I'm having trouble getting TIM2 PWM to work so I've been studying the RM closely. The following conflict came to light.The RM shows TIMx_ARR and TIMx_CNT as 16b, but TIMx_CCR1,2,3,4 as 32b. The text (section 17.2) says TIM2 & TIM5 are 32b. Some debug...
