STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...


Send COMP output to 2 TIMs as follower and inverter.

I want to generate differential signal from this MCU itself. I'm using NUCLEO-H723ZG doing this which has DAC, COMP and TIM built-in.I've used 2 DAC for generate 2 simultaneous UART signals (If there's other ways to do this please recommend) but it's...

AMagk.1 by Associate II
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How to send another START bit during an I2C transmission

Hi,I am trying to set the FRAM memory mb85rc64ta in sleep mode (Datasheet: I cannot copy and paste a link, but it is from Fujitsu and the pdf file is called MB85RC64TA-DS501-00044-4v1-E page 11)It requires 2 START condition but no STOP condition befo...

P M by Associate II
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how can we send binary data on two different pins simultaneously on both the rising edge and falling edge of dclk whose speed can be 1MHz on stm32f4?

PCA is managed by a full-duplex serial interface. A typical data frame is defined bya burst of 8 DCLK pulses followed by an assertion of a DLOAD pulse (these lines are driven by the host printing system.). During each frame, 32 bits of control or pri...

SAMIN.1 by Associate III
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STM32 Custom OTA Dual Bank Config

Hello There,I'm working on OTA application and successfully executed single bank OTA.Now I'm looking to switch to Dual bank operation to make it more reliable. So, there are 2 banks (memory areas) and after each update, the active bank changes. Means...

KAgga.1 by Associate III
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How to implement Pulse counter on STM32H723?

Hi,In our application we are using a cooling system(i.e., a FAN/DC motor). For which I have implemented TIM1 in PWM mode to control the speed of the FAN, the story doesn't end here. The FAN provides a feedback which is called as pulse sensor which ca...

Arrhenius by Associate III
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