STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
My objective is to utilize ADC peripheral for reading analog signals and converting them to digital. I am using the polling method for reading ADC values. When setting up the chip configuration, I am currently using the Nucleo-H743ZI with default set...
Hello,i am trying to generate a fixed 800kHz PWM signal with variable duty cycle on a STM32F446RE (Nucleo-446RE). As you already might have suspected, i am intending to drive WS2812B LEDs.For this I intend to let TIM1 run at 800kHz and have TIM_CH1 r...
Hi all,I'm planning to use an STM32F405 and its FSMC to interface with an external, parallel 16-bit NOR flash chip from Infineon/Cypress.This chip has a read page size of 32 bytes / 16 half-words.When reading a half-word that is located in a page whi...
In a stm32f303rb76, I commanded to operate ADC+DMA by setting of the ADC DMA with circular modeThe ADC I activated continuous conversion modeand DMA continuous requestAlso the analog input signal (no scan mode)In the initialization made following com...
I have a prescaler (20), an ARR of (65535) and a Repetition Counter of 3 on a 20MHz clock ....On the scope it all looks good...Question if I set a timer up to be triggered by the Update Event, will the timer being triggered update on the output I see...
For example: 1000: is Combined PWM Mode, 1111: is Asymmetric PWM Mode 2. How do you fit 4 bits into 3 bit spaces? Bit 7 is used for OC1CE, and Bit 3 is used for OC1PE so there is no space on either end for the extra bit.
I configured SAI1 asBlockA: I2S async slave transmitterBockB: I2S sync slave receivermanaging the data transfers with GPDMA1. The slave transmitter works fine, I get the half transfer and transfer complete interrupts correctly. But for the slave rece...