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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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Regarding the COM PORT not showing

I was getting Start with STM32F401CCU. I am not able to find the COM PORT to USE in ARDUINO IDE.But in Device Manager i was able to find the belowAs STM32 BootLoader. Which i am not able use ARDUINO IDE.Can AnyBody help me to fix this

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stm32 h747 uart8 hal_uart_init wrong

If when i use hal_uart_init(&huart8) get result Details:HAL_ERROR Default:HAL_ERROR,Decimal:1,Hex:0x1,Binary:1,Octal:01.When i use step into ,reach at final while(sets-- !=0u)and no more what does this mean ? how could i solve this problem? static vo...

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wjian.2 by Associate II
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  • 3 replies
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STM32Cube MX, VScode setup

Hello.I'm having issues with STM32CubeMX and VScode setup. I have the STM32 VScode extension installed and all the extras that were required as per this page ( https://marketplace.visualstudio.com/items?itemName=bmd.stm32-for-vscode ). I generate a m...

ROVguy by Associate
  • 2846 Views
  • 2 replies
  • 1 kudos

Several DMA streams running in "parallel"

Hello!I'm new to DMA concept, and need some clarification on several DMA questions (STM32h7). Q1. From RM0433: "To ensure data coherence, each group of transfers that form a burst are indivisible: AHB transfers are locked and the arbiter of the AHB b...

MNema.1 by Associate II
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  • 2 replies
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Trigering ADC in the Middle of PWM ON Duty Cycle

Posted on February 07, 2013 at 19:23Hello, My intention is using TIM1 Complementary PWM Channel 1-3 for Brushless Motor Control. I want to sample the Phase Voltage at the middle of PWM ON Duty Cycle. I have configure TIM1 to output 6 Channel PWM but...

Resolved! STM32H563VI Octo-SPI interface dummy cycles

Hi,someone can explain me how to calculate the "dummy cycles" number reading an external flash qspi such as the Winbond W25Q64JV ?I have to read in qspi mode with the Fast Read Quad I/O (EBh) command in SDR mode. The flash memory datasheet asks for 4...

Ez by Associate II
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  • 4 replies
  • 1 kudos

Resolved! Efficient de-interleaving without waking the CPU

I am using the STM32G474 and have the following situation:I have configured a Timer to run continuously at 25 kHzThe Timer triggers the ADC to start a sequence of 6 conversions (i.e. 6 ADC channels)Upon completion of each ADC conversion, DMA transfer...

Olly by Associate II
  • 1150 Views
  • 5 replies
  • 4 kudos

Resolved! Unable to get maximum SYSCLK of 480MHz on STM32H743XIH

With SYSCLK set to 400MHz in MX Clock Configuration there is no problem, but any setting above ~420 up to the maximum of 480Mhz causes the system to 'crash' during initialisation in HAL_RCC_ClockConfig(..). More specifically when or after RCC->CFGR i...

DavidO by Associate II
  • 921 Views
  • 4 replies
  • 3 kudos