Hi,I'm currently using the STM32F103 SPI to read the MKI194V1, but I've noticed that the ID I'm reading is always 0x4A. Could you please help me check if there's an issue, or provide any sample code?I also take a photo of the MKI194V1. The marking on...
Recently while using the TIM1 feature in NUCLEOF302R8(DOCUMENT NUMBER:DS9896), I've found that the address was wrong in the datasheet but the address of TIM1 in SFR is correct when I tried the address in SFR's It worked. I'll list the findings that...
I am using an STM32L562VET6Q MCU. I have been having issues getting a valid reading from the ADC. The signal is essentially DC (i.e., no fast high frequency measurements) so I conservatively set the ADC sampling time to its maximum. My reference v...
Hello Everyone,Right now i am facing the issue on detection USB.I am attaching snap shots of the my USB configuration.USB port not shown after powering up the board. i am doing some basic thing like on receiving via USB in RX interrupt function of US...
Giving an example for my question. For STM32H563, for freq. 140MHz, it is possible to use three different configurations:- 4 WS, VOS2- 4 WS, VOS1- 3 WS, VOS0If I want to optimize for power, I should choose 4WS VOS2. If I want to optimize for performa...
I'm trying to migrate my Azure IoT application from a BG96 to a BG95-M3, both from Quectel. I have solved some problem due to the difference in use of the uart3 pins of the BG96 and BG95. Should I make more modifications to the software? Is there a d...
Good evening,I am trying to sample various signals at different frequencies with adc in dma. Changing the size of the acquisition buffer seems inefficient, so I opted to change the clock prescalers, but it's giving me problems (I guess on changing th...
They are defined like this in stm32h563xx.h:/*Buffer Descriptor Mask*/ #define USB_PMA_TXBD_ADDMSK (0xFFFF0000UL) #define USB_PMA_TXBD_COUNTMSK (0x0000FFFFUL) #define USB_PMA_RXBD_ADDMSK ...
I am struggeling with a HyperRAM on STM32H7A3 with OctoSPI2 in Memory Mapped Mode Write.In order to check, if the access to the HyperRAM is ok, I am running through a loop which writes all 0 / 0x55555555 / 0xAAAAAAAA (with 32 Bit access) to the RAM a...
I am trying to increase FCLK, and I changed the voltage scaling to VOS0, and configured the PLL1 for 240 MHz (src=HSI (HSIDIV=2), M=2, N=30, P=2), but it did not boot (it freezes when a change the system clock mux to PLL1). I realized when I decrease...
