On STM32C0, is SRAM preserved in Sleep mode if RCC_AHBSMENR.SRAMSMEN=0?

[Terry Greeniaus]

Hello,

In STM32C0 RM0490, section 5.4.16, the RCC_AHBSMENR describes the bit SRAMSMEN which can be used to disable the SRAM clock during Sleep mode to save power.  We will be using the STM32C0 in a low-power application and I was wondering if the SRAM contents will be preserved if the SRAM clock is turned off while we are asleep?

Typically we will be in Standby (or maybe Shutdown on the C0 instead) mode for long periods and then the MCU will come alive to do a sensor measurement over ~100ms.  During the measurement period we will typically be asleep in between interrupts (of which we will take ~4000 during this period, in a very short IRQ handler with SLEEPONEXIT enabled) and want to save as much power as possible while asleep since this is our "high consumption" phase.

Thanks,

TG

[Danish1 · Accepted solution]

As this is STATIC ram, you don’t need the clock to maintain the stored values in SRAM.

But when there’s no clock, you can’t read from or write to it.

You might wonder who/what would access the SRAM while the processor is sleeping. An answer is DMA. You can, for example, program the DMA to pump a buffer-full of characters out of a serial-port and have the processor sleep until it’s complete.