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I'm using a B-U585I-IOT02A board and the IOT_HTTP_WebServer example code. My read is the PSRAM is 8M on that board, but I can only access 16K (to 0x2803ffff) and then ???? is not IDE memory display or a trap in the code. Is this a CPU configuration ...
Currently, on the STM32G474, I am able to perform on-the-fly flash operations and interrupt vector relocation using BF_MODE and VTOR. However, I have encountered an issue: when a function is placed in RAM using the ramfunc attribute or located in CCM...
Hi All!I try to use 2 pieces of IS66WVO32M8 PSRAM with multiplexed OSPI ( only the NSS pins not shared ) with STM32F585 in memory mapped mode.Previously, I used 2 pieces of APMemory's APS12808L in memory mapped mode without any issues.I reconfigured ...
hi ；During the operation of STM32H723VGT6, the constant input bus error and hardware error interrupt occurred, and the clock is 280M. The PWR_REGULATOR_VOLTAGE_SCALE1 is unstable. The clock configuration __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_...
Hi Im Lalin, Im using STM32L433RC-P MCU for learning.Im facing the issue in reading the data from ADC.Im not getting any error too.Below are the source code attached.Kindly help me to find the solution for this.Note that im using uart.c for debugging...
I am using the STM32H742 MCU.Currently, System CLOCK is set to 480 MHz and APB TIMER and AHB maximum CLK is set to 240 MHz.However, the maximum frequency of TIMER and GPIO cannot exceed 25 MHz, so what should I do to make it over 50 MHzAttached is th...
Hi i'm using STM32F411RE. I've been reading data from ADC IC using I2C communication. It's 400Khz, and I'm reading using DMA. By the way, if another interrupt with high priority occurs during I2C communication, it runs that interrupt during I2C commu...
Dear ST Support Team,I am currently working with Alliance Memory SPI-NAND Flash (part number: AS5F38G04SND-08LIN]) and noticed that Alliance Memory lists process compatibility with only three STM32 families: STM32MP1, STM32H723/5xE/G, and STM32H742/...
HI~I use STM32H563ZI NUCLEO.And I develpe LPUART GPDMA , but LPUART GPDMA2 rx interrupt not working.LPUART RX GPDMA ch0LPUART TX GPDMA ch1Let me know how to config. Thanks
Title edited to give an accurate idea of the issue. Hello together, i had a problem with setting a correct bit time on a CAN-port. On my nucleo-h755ZI-Q board, I want to operate the FDCAN1 by the CM4 in classic-can mode with a baud rate of 1 MHz. I s...
