STM32F427ZGT6 inaccurate delay
Hello, when I was using this chip, STM32F427ZGT6, it could print data, but the delay was incorrect. After 5 seconds, it was only a few milliseconds. Due to the inaccurate delay, the timing sequence became disordered
STM32 MCUs Products
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UART bootloader mode does not work after the board has been programmed
Dear Sir, My board is equipped with STM32G431 MCU. I found that the UART DFU mode of my board does not work after the flash of the MCU has been programmed. The UART DFU mode can only work with a blank MCU that have not been programmed before. I have...
SAI: SPDIF output in all MCUs ?
Heyho,do all SAIs in all MCUs offer the SPDIF output feature?CubeMx and online MCU selectors do not show this info, no time to check 20 more datasheets.For the few STM32 I know and worked or played with (G4, F7, H7) the answer is yes.Merci!
STM32N6: External Loader Manager, ISSI Flash
Hello,Hello, in our project we are using an STM32N6 MCU and an external flash from ISSI with this MCU. Datasheet of the flash's link in the below.https://www.issi.com/WW/pdf/25LX-WX032-064.pdfDuring debugging, we read the flash using standard command...
STM32F407 RAM Interface impedance matching
Hi Team,As we are going to use RAM – IC CY62136EV30 (TSOP-44) in our new project with ST micro STM32F407ZG (LQFP-144).Do we need any impedance matching for 6-layer board?Can you please suggest the same. Crystal frequency we taken 16MHz for the MCU.Th...
STM32H7S XSPI1 Memory Fault Despite Errata Workaround Implementation
System OverviewHardware ConfigurationMicrocontroller: STM32H7S3L8H6Memory ArchitectureXSPI1 (Flash, MX25UW25645GXDI00): 32MB, accessed via GPIOP/GPIOOClock: PLL2S source, Prescaler = 3flash_xspi_handle.Instance = config->instance; flash_xspi_handle.I...
Using Asymmetric Mode to generate two phase-shifted waves
I am trying to create two phase-shifted PWM waves on an STM32L4 TIM1 using asymmetric mode. From what I understand, I have to:enable output on GPIO channels 1 and 3enable output compare 1,2,3,4 and output compare 1,2,3,4 as asymmetric PWM modeThen, I...
Resolved! STM32N6: Expected DMA/SPI Performance
Hi,I am working on an application for the STM32N6 (using zephyr) that streams data from four SPI interfaces (SPI1, SPI2, SPI3 and SPI6) via Ethernet (UDP). I am using full-duplex SPI transfers and GPDMA1.Everything works fine up to SPI clock frequenc...
Resolved! DCMIPP Capture Buffer Not Receiving
Hello,I’m currently testing the CSI–DCMIPP interface on the Nucleo-N6 board. I’m following various examples, but the variable used in DCMIPP_Start (lcd_bg_buffer) is not receiving any data. Is there something I might have configured incorrectly?At th...
Resolved! Why does PA4 chip select not stay high when configuring PUPDR pull-up on STM32F407VGTX?
Hi,I’m working with the STM32F407VGTX and I am using GPIO PA4 as the SPI chip-select (CS) pin. In my GPIO initialization, I set the PUPDR register to configure PA4 with a pull-up, expecting the CS pin to remain HIGH when idle. However, I observe on m...
