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Posted on May 17, 2018 at 20:19Hello EE verse,Can anyone explain the below implementation ?I did see the reference to this function in the cortex_m4 generic reference manual but couldn't understand how the register is mapped.Also no sure why in NVIC...
Posted on May 17, 2018 at 18:45Hi, I am a bit stumped at the moment. I attached the files that use the main code.In usbh_usr.c, the function 'USBH_USR_ReadWriteFirmware(void)' is the ffucntion that attempts to open the file. The line 'if(f_open(&fil...
Posted on May 17, 2018 at 18:46I'm trying to implement a DFU solution for an STM32F411 device and am having a tough time figuring out what the best solution is. Unfortunately the STM32 is the PMIC for the host that needs to do the DFU so bootloader ...
Posted on May 07, 2018 at 14:08With STM32F765 and MDK-ARM compiler ( O3 and compile for SPEED I was able to achieve 108Mhz on output pin, performing while loop ( just main() and all interrupt disabled ) .Now with STM32H743 with same compiler and sam...
Posted on May 17, 2018 at 12:25I tried to compile the 'Hello World' example provided in stm32cube F7 package, with no success.I copied all files from STM32Cube_FW_F7_V1.11.0/Projects/STM32746G-Discovery/Applications/STemWin/STemWin_HelloWorld/Core a...
Posted on May 17, 2018 at 11:08In RM0430 rev 7 section 6.2 it is stated that when TIMPRE is set and APB prescaler is 1 or 2 then the timer clock is HCLK.And when APB prescaler is > 2 then the timer clocks are HCLK * 4.This is different to the F446 w...
Posted on May 17, 2018 at 14:44Please, have anybody an example that shows how can I interface a STM32L476VG with a multiplexed SRAM? thanks
Posted on May 17, 2018 at 12:57Hi, We are using uclinux in STM32F769I discovery board, We want to implement CANopen stack on STM32F769I board in uclinux environment. uClinux support socketcan but we need CAN driver to interface with board, Please ...
Posted on May 17, 2018 at 14:17Hello!currently looking into bootloader modes and working with the STM32F7.while going over the AN2606 document (STM32 microcontroller system memory boot mode)i noticed an issue - 'Bootloader unavailability on STM32F10...
Posted on May 16, 2018 at 10:08Board/Processor : STM32L476RG-NucleoExample code from: STM32Cube_FW_L4_V1.10.0ARM IAR compiler V8.I can successfully build and run the TIM_OCActive / TIM_OCInactive examples on the above board, they produce the require...
