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Hi Team,I am using the stm32h745ziq as my development board to develop the FDCAN. To implement this I am not able to find any example for this FDCAN to this particular board.Can you please send me any FDCAN example program to this NUCLEO-STM32H745.Be...
Hello,I am attempting to communicate between my STM32H7B3I-EVAL and a Vector CANalyzer (VN1630A). I previously reached out to figure out why my CAN messages from the CANalyzer are not being received by the STM32 MCU. There was a belief that it was th...
stm32cube mx just generate flash.ld linker script. So I create my own ram.ld linker script, also i modify system_stm32g0xx.c to point the entry point to sram /* Note: Following vector table addresses must be defined in line with linker confi...
Hi,In the snippet below, comment says select PLL as system clock but in code it is configured as HSE clock which one shall be considered? /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ RCC_ClkIni...
For the package LQFP48 the pinout is the same. Also Pin names are the same. So is it possible ?
Hi,I'm testing running a relocatable binary model.But when I use ai_rel_network_run(), I get into HardFault.The detailed error information is as follows, with my current test code attached.Hope that someone can help to resolve this issue!Thanks. /* U...
