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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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HAL and MISRA C compliance problem

I've started a project with HAL library using stm32cubemx. I'm using keil for my programming and I've added PC-Lint (MISRAC checker) to check C standards. But when I run PC-lint to check MISRA C rules, I will receive lots of MISRA C 2012 violation ru...

AKhor.1 by Associate II
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Resolved! GPIO PINS PA1 and PA2 Unexpected behaviour as an DIGITAL PULL DOWN INPUT resulting also in problems when using them as ANALOG INPUT

Good day to everyone on this forumI was working on a code, my borad is a Nucleo-144 STM32F746, At first I was trying to read 12 Analog signals, from 0 to 3V with DMA and the reads were good exept for some channels with noise and a weird offset, I red...

SGonz.1 by Associate
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Resolved! RM0091 typo (OVF)

In RM0091 rev.9, footnote 2 to Figure 273 on Page 760 has the following text:All the events associated with the transmitter receive flow must be ignored in standard transmit only mode (e.g. OVF flag).There is no OVF flag in the 'F0xx SPI; this shoul...

ST Nucleo board with BLE 5.2 and NFC?

Hello,I have developed a device using an STM32F4 but am now trying to either add BLE or merge to an SoC with BLE and don't know the easiest path forward. I need OOB pairing using NFC but am very limited in PCB space.Does ST provide an all in one SoC...

kcire L. by Associate III
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Resolved! L4R7 prefetch enabling and disabling

Hello,Does anybody know if there is any prerequisite when enabling or disabling the prefetch buffer?More specifically, in the Nucleo L4R5ZI sleep example the prefetch buffer is disabled in main() just before the main loop. It is never re-enabled afte...

NArnd by Associate III
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