About waclawek.jan

waclawek.jan · 2024-08-13

(Spotted by sx107.)I know the subject is not very descriptive, but a figure is worth 1000 words:It's also in other 'H7 RMs; I leave it to ST to check them all (Btw. this is a carryover from the 'F7 RM, where both OTG's SOF indeed feed into TIM2 ITR1...

waclawek.jan · 2024-07-30

The infographics displaying all Nucleo boards at once is missing from https://www.st.com/en/evaluation-tools/stm32-nucleo-boards.html . JW

waclawek.jan · 2024-07-16

This is new. I've used it in the past and downloaded data with no problem.Yes, I do have network connection - this post from the very same PC at the moment.JW

waclawek.jan · 2024-07-15

I've just clicked at this link (which came to be thanks to several botched migrations) in this thread, to get this message:I am not paid by ST to handle user interfaces, thus have no intention to write a mail to that address, explaining, that this is...

waclawek.jan · 2024-07-07

Also, the only DAC pin marking is so sloppy that this can be found on one single page:I'd recommend to go through all DAC-containg DSs and RMs and unify nomenclature. It's okay (and IMO preferrable) to call the single DAC module DAC1 and its single p...

waclawek.jan · 2024-08-24

Hi @Clara1 , @Observer_A ,I wonder if either of you have been able to remove the problem, and if yes, what were the conclusions.Thanks,JW

waclawek.jan · 2024-08-24

As I've said, I2S is *stereo*, so you have to have two uint16_t per sample.For example, if you want the buffer to hold samples for 1 ms and the sample rate is 48kHz, then you need 96 uint16_tvalues in the buffer. In pseudocode:uint16_t buf[nrOfSample...

waclawek.jan · 2024-08-23

That's called Compare. Just set one of the TIMx_CCRx to the desired compare value, enable the related interrupt by setting TIMx_DIER.CCxE, enable the timer interrupts in NVIC and write the ISR (Interrupt Service Routine).I don't use CubeMX but I thin...

waclawek.jan · 2024-08-22

Reset/Update sets CNT=0 in hardware, so there should be no need to do that in interrupt.Try perhaps to draw a timing diagram of what do you want to achieve.JW

waclawek.jan · 2024-08-22

I personally would perhaps give up on the idea of using the Toggle mode for this purpose, as it sounds to be an easy source of problems. If the output is not to be very fast, I would perhaps simply do things in software; if it would need to be faster...

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in 'H7 RMs, incorrect ITR description for OTG USB SOF-to-TIMER, in figure caption

Nucleo infographics missing

ST MCUFinder can't find server

Site Maintenance, or is it Security Issue?

STM32F410 RM DMA table contains nonexistent DAC2

Re: Sporadic reset of Backup Domain at power off/on despite backup battery

Re: STM32F439 I2S double the audio frequency

Re: generate timer interrupt at CNT value

Re: TIMER1 STM32F411 Resync

Re: Synchronise 2 independent timers in OC Toggle mode