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Resolved! About output compare mode of STM32G071RB

I want to perform a timer interrupt using the output comparison mode.When the frequency is set to 2000Hz, ARR : 20, CCR1 : 25, I think that interrupt does not occur because ARR <CCR1, but interrupt occurs. Why do interrupts occur?

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Sodag.1 by Associate II
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we have a EEPROM device ( M24C16, M24C08 ) to record a calibration data for the pump. can someone share with me a scenario of data corruption during the power up mode and operation mode when read/write access is needed

we have experience checksum change ( or data corruption ) anomaly in various stage of production assembly process, this anomaly occurs 1) when we power up the system, we got checksum error, does it mean that the data from default factory setting wa...

jli.3 by Associate
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STM32H7 HAL QSPI delayed clocks

I'm reading data from an FPGA over QSPI. I'm attempting to read 256 bytes at a time. However, when I read the data the QSPI clock decides to take a long pause before continuing. I get an initial burst of 74 clock pulses, then 56 bursts of 8 clock pul...

0693W00000NrMdrQAF.png

how HAL_UARTEx_RxEventCallback is executed?

Hello! Im receiving data by UART with DMA and now I wonder, how is HAL_UARTEx_RxEventCallback is ejecuted?Because I'm receiving and saving chunks of data in a buffer, then adding a header and a tail in this buffer to send it by USB, but I realized th...

SGonz.2 by Associate II
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Resolved! I2C slew rate limiter

Hello everyone,Is there a setting/command to limit the slew rate of I2C signals of a STM32F429ZI-Disco board? I know this feature is available on some Microchip micro-controllers.Thank you.

dliky2 by Associate II
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