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In STM32F103xx manual, FSMC timing is seem wrong

In STM32F103xx manual, Synchronous non-multiplexed PSRAM write timings gragh (76page, Figure 31) is wrong?? This is same Synchronous multiplexed PSRAM read timings(Figure 28).Please let me know if the manual is wrong or if I'm wrong

SHa.3 by Associate
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Resolved! First defined here, stm32cubeide. Help me here bitte.

Stupid Error: Banged my head more than 30 times. No result.I want to debug using segger system view. Everything is good. but some first defined here error.C:/Users/xxxx/OneDrive/Documents/ImportantDocuments/FREERTOS/RTOS_workspace/001_ThreadManagemen...

Vmere.1 by Senior
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Micron flash versus Macronix flash

STM32H7B3I EVAL hosts a Macronix flash.stm32h7b3i_eval_ospi.c and mx25lm51245g.c implement functions to initialize, erase, read and write the Macronix flash.Unfortunately, Macronix flash is unavailable in commercial quantities and we're planning to u...

Resolved! Why is MotorControl Workbench failing to open projects?

Due to hardware limitations, I must run MotorControl Workbench through the command line. However, running the executable WB_Console.exe fails to open valid projects.Command issued:"C:\Program Files (x86)\STMicroelectronics\MC_SDK_5.Y.4\Utilities\PC_...

DSchu.9 by Associate II
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STM32H753XIHX_FLASH.ld Question

Regarding this memory declaration section in the .id file, what does the "x" in the parenthesis represent?/* Specify the memory areas */MEMORY{ FLASH (rx)   : ORIGIN = 0x08000000, LENGTH = 2048K DTCMRAM (xrw) : ORIGIN = 0x20000000, LENGTH = 128K RAM_...

RLein.1 by Associate II
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Shared SDRAM via FMC with dual core stm32h745

I am seeing the same issue as this question here :https://community.st.com/s/question/0D53W00000HyV6FSAV/fmc-with-dual-core-stm32h745I can configure SDRAM access on the STM32H745 for the M7, but when running two cores I cannot get access from the M4 ...

SNort.1 by Associate II
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