About OliM

OliM · 2024-11-26

Hi, I am trying to check the oscillator tuning of our boards and did some reference testing with a WB55 Nucleo. using aci_hal_tone_start. Using 0,0 I do get an output near 2.402GHz, but not quite were I would expect it. The header says the following:...

OliM · 2024-11-18

To secure my bootloader against erroneous writes from the application I want to enable write protection on it. But since for some things the bootloader needs to modify data inside its partition (security counter update and key invalidation), I can no...

OliM · 2024-09-19

Looking through the WB0x portfolio, it looks like the WB06 and WB07 VFQFPN are completely unattractive and even the WLCSP not a good bargain.STM32WB06KC is supposed to be 1.87 Dollars, whereas STM32WB09KE stands at 1.013 Dollars.Also the later would ...

OliM · 2024-08-09

We planed the BlueNRG-LPS in one of our projects to use it as a Network Co-Processor via the ACI command set and also have some code ready for that. Can we now just switch it against an STM32WB05xN and use the same commands, or is their command set d...

OliM · 2024-07-31

I am trying to get application level RDP progression into my bootloader to kind of self protect my firmware once it has started. I have set level 1 and the firmware still runs and I can no longer read out flash or debug, so that's the positive side.B...

OliM · 2024-12-04

In case someone else runs into this, via Support ticket I got he following response:The function produces only the carrier wave, without the GFSK modulation. So it should be 2.402GHz. The note about sending all 0s and frequency deviation is not corre...

OliM · 2024-12-03

At least on WB55 and WB35 there is room above the shared part before the SRAM2 area of the second core starts. SBRSA gives info about which part is actually accessed by the second core.This is how I use it:/* Specify the memory areas */ MEMORY { FLAS...

OliM · 2024-11-18

I think I still have one more question:Since WRP is an option byte, that also means it is no longer writable in RDP level 2, right?

OliM · 2024-11-18

So for WRP changes to take effect, the system needs to reset. In my mind that's a long way from dynamically enabling/disabling the feature, since it is actually static during runtime.But at least I now know that this is the case and can try to work f...

OliM · 2024-11-18

Hm, the reference manual also statesSetting OBL_LAUNCH generates a reset so the option byte loading is performed undersystem reset.Doesn't this contradict the following?You can dynamically enable and disable WRP by modifying the option bytes and then...

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Working with aci_hal_tone_start WB55

Dynamic use of WRP (in STM32WBx5) ?

Confusing STM32WB0 prices

STM32WB05xN to replace BlueNRG-LPS

STM32U5: impossible regression from RDP1 to RDP 0?

Re: Working with aci_hal_tone_start WB55

Re: STM32WB Shared RAM

Re: Dynamic use of WRP (in STM32WBx5) ?

Re: Dynamic use of WRP (in STM32WBx5) ?

Re: Dynamic use of WRP (in STM32WBx5) ?