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I know the product is new, but are there already some plans on the horizon to maybe increase the flash size and/or have some more intermediate sizes?
In the Datasheet it says:"The VREF+ pin is double-bonded with VDDA on some packages. In these packages theinternal voltage reference buffer is not available."Does this implicitly mean all packages which do not explicitly have a VREF+ pin can not use ...
The first idea when watching the STM32 summit an hour ago was of course to directly replace the L0 chips in the projects which are still under development. But it looks like the QFN32 variant is not pin compatible (at all). Pin 1 to 4 and Pin 30 to 3...
So is this chip now completely released or not?The product page is available and says it is active, but it does neither offer a reference manual nor a price indication.Form what I understand it is basically a BlueNRG-LPS with more Flash. Meaning the ...
Using the suggestions from https://community.st.com/t5/stm32-mcus-wireless/stm32wb-sram2a-what-is-the-size-that-can-be-used-without/m-p/176847I can now address the remaining non secure SRAM2A as BKUP_RAM. During runtime this seems to work just fine, ...
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