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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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Resolved! STM32L4R: How do Flash Option DBANK and DB1M interacts?

In FLASH_OPTR, both DBANK and DB1M are r/w and have no restrictions beside that PCROPA/B needs to be disabled. For 1M device there are two(?) sensible settings DBANK=1, DB1M = 1 for 1Myte dual bank continous modeDBANK=0, DB1M = 0 for 1Myte single ban...

Implement Cordic of Arctan2 through ADC and DMA

I need to calculate angle value with input of sin/cos from ADC1/ADC2 channel by DMA way. As using the cordic of atan2 function,I think that two parameters of Y and X need to be written to pInBuff as like the key code below, is it correct? sCordicConf...

CWang.9 by Associate
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I'm trying to use HRTIM to generate non-overlaping PWM pulses on 2 outputs, and be able to change which output is first in time. I've tried various methods and find when I change the output order, it corrupts the pulse lengths and they overlap.

Nulceo 64- F334R8. Using Timer A on HRTIM1 to generate non-overlaping PWM pulses on 2 separate outputs. I use 4 CMP registers, defining the start and end time of each pulse (CMP1 = pulse 1 start, CMP2 = pulse 1 end, CMP3 = pulse 2 start, CMP4 = puls...

ORidl.1 by Associate
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