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Hi, i've been building self balancing robot, so i needed quite lot of periphelias to be working together, they are: I2C, EXTI's, two Timers in encoder mode, Timer in PWM generation mode and GPIO outputs.I'm using STM32CubeIDE 1.9.0., and STM32L432KC ...
I want to insert the string my_data_SRAM in the base address of the FLASH. I wrote this code and tried 2 ways:1) *((uint8_t *)BASE_ADDRESS_FLASH+i) = my_data_RAM[i];2) HAL_FLASH_Program(TYPEPROGRAM_WORD, (uint32_t *)(BASE_ADDRESS_FLASH+i), my_data_RA...
Did anybody already develop a code for SPI to I2C bridge using STM32CO? If yes, where can I find it?Thank you
The JTAG pin TDI shares functionality with the UART4 CTS function , how do I use CTS and and still program the part with the JTAG connector?Any help appreciated.Richard
The L6474 uses SPI in MODE 3 where CPOL = 1 and CPHA = 1My logic analyzer is saying that having the SCK low when the CS is pulled low or enabled the idle state of the CLK (a.k.a. SCK) is not correct for MODE 3. After the first transaction the SCK st...
On a NUCLEO-F401RE, I am observing strange conversion values when I apply higher voltage than Vref to an ADC pin and carry out conversion on it. I would have expected the converted value to be 4095 (0fff) but in reality it is more like 3233 (0ca1) fo...
I have configured the TIM1 with PWM CH1 and CH1N, with 62.KHz frequency .I am getting the 180 degree phase shift for 50 % duty cycle .If i vary duty cycle to 30 % then CH1 =30% and CH1N will be 70 % and it is inverted .I need same duty cycle with 180...
I have an STM32F403ZH Nucleo board and it's connected to three separate CAN channels. I would like to be able to receive identical messages on any channel (same identifier, baud rate, etc) and have the microcontroller be able to determine which one i...
Hello all,I have a RS232 device (diagnose interface) that I want to replace with a Nucleo-G431KB board. To make it work I would like to use CDC (virtual port), but I need the RS232 specific signals, especially DTR/DSR, CTS/RTS... I looked in the exam...
I am trying to implement a "dual bank field upgrade" with a STM32G0B1CEU6 as described in AN4767, chapter 2.4 (for a STM32L0). As far as I know the STM32G4 also has this functionality, not 100% identically implemented but with the same intention. See...
