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Hello,we are trying to flash the external NOR flash at address 0x90000000 with Openocd 2-times and get an error at the second flash try: Open On-Chip Debugger > program /home/xyz/kr.elf [stm32h750xbh6.cpu0] halted due to debug-request, current mode: ...
I am having trouble with getting FatFS to work with SDMMC. When I try to do f_mount, I keep getting an FR_NOT_READY error. It seems to be coming from when initializing the SD card in sd_diskio.c. The tutorials I have found online seem to have the BSP...
- STM32G0B0 USART1 receiving RS485 data via interrupt driven data collection. Our micro is attached to a RS485 interface(38400, 8,N,1) receiving BACnet data. The data taken on the 485 bus is different from what we receive in the USART buffers. We h...
Looking to add self test to a project using both STM32L4 and STM32H7While going through the versions of x-cube-classb, it appears versions 2.2.0 must be used for STM32L4 and version 2.3.0 and further for STM32H7.Is there a way to use same version of ...
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Below i have attached a code which enables the PLL freq of 72MHz using HSI of 16MHz. The issue is if I give a Timer pre-scaler of 36000-1 (I am using timer2, which in case of STM32F401RE is on APB1 bus so using a pre-scaler of 2 for APB1 which makes ...
Using Nucleo-U575ZI-Q (rev X) board I try to do a PoC - a very simple UCPD source app providing default USB 5V and 0.5A max. With undocumented onboard SB8-10 shorten this probably can be accomplished. I know this board does not provide output current...
Hi,Im trying to get CRC16 - DNP from a string array that its the next:char Message2[] = { 0x00, 0x00, 0x00, 0x29, 0x30, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0x31, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x30, 0x32, 0x30, 0x36, 0x33, 0x57...
Hi there i m a student working on STM32F723 the first time, I encountered an register setting example as follows: GPIOC->MODER |= ((2<<(6*2)) \ (2<<(7*2))); i konw its setting the GPIO register but whats the meaning of * and 2<< at the beginning sen...
I'm a bit confused about the necessity of clocking the SWD ports using STM32G0B1 chip.There is a I/O port clock enable register (RCC_IOPENR) that enables the functioning of each of the GPIO ports (Port A - Port F), its reset state is all zeroes, so n...
