STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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Timer Interrupt Code Doubt

Hello. I used to use the following code for starting a timer interrupt and used to set up the pre scalar and counter such a way I get the desired frequency but now this code is not working. My LED doesn't blink at all. I just wanted to check if the c...

STM32F103C8 SPI1 MOSI ISSIE

HiI try to run SPI 1 on STM32F103C8 but when i send data i have only SCK signal. MOSI(PB5) is in high state (dont change). SPI2 on PORTA works grate.void MX_SPI1_Init(void) {   /* USER CODE BEGIN SPI1_Init 0 */   /* USER CODE END SPI1_Init 0 */  ...

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MSkor.1 by Associate II
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Hello, I am working on the Normal Mode on STM32H735G-DK board using FDCAN1 & FDCAN2, but the callback function is not triggered, but when I use the same code on STM32H745I-DISCO board, it worked, anybody has any idea?

always stuck in here Error_Handler, and only TxData can load Message successfully twice, so I think it's because of the Callback function is not triggered, so the transmission is interrupted and also RxData didn't receive message.Here is the Callback...

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Acecream by Associate II
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Resolved! STM32U5 LSE/PC13 Errata and LSE bypass mode

The STM32U5 Errata Sheet (ES0499 rev 5 is the one I am looking at) has errata 2.2.1 which says: "The LSE frequency can be incorrect when PC13 is used as output for RTC_OUT1 or TAMP_OUT2 function". The workaround: "The RTC_OUT2 function must be used ...

How do you set up LPUART1 with an STM32L452RE?

Hi i'm trying to get the LPUART (PA3, PA2) pins to communicate with my computer via the serial port, but i can't get anything to work. Here is what i'm trying to use at the moment...Sysclock Config:#pragma once   extern "C" void SystemClock_Config(vo...

RBamf.1 by Associate III
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