STM32 MCUs products

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New possibilities for the ultra-low power segment!

STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...

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STM32: Performance for FFTs

1) We are looking to perform 140 FFTs each having 2048 samples every second. How can I gauge the performance of STM chips for this purpose or are there benchmarks or data published about this?2) Are their suggested libraries for running FFT’s on STM3...

PNada.3 by Associate II
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Resolved! Currently we make use of three SPI busses on a STM32F405. SPI1 is a slave and SPI 2/3 are masters. I switch SPI1 to master mode and it just doesn't work. I suspect the APB2 bus but I think I have it set correctly.

Here's my code:SPI_HandleTypeDef spi_handle = { .Instance = DEF_SPI_INS_SPI1, .Init = { .Direction = SPI_DIRECTION_2LINES, .BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2, .CLKPh...

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MBish.1 by Associate II
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Resolved! Active BOOT0 by software on STM32L432

Hi all,I'm creating a personnal board with an STM32L432 mcu, but I have a question about BOOT0. I'd like my futur to give the possibility at my futur clients to update the board. To do thaht I know I can use DFU mode and to enter to this mode BOOT0 s...

SBaro.11 by Associate III
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Resolved! Double buffered DMA on SAI_I2s_tx CT/TC conflict

I'm running tx and rx of SAI_I2S by double buffered DMA.I expect on double buffered DMA to change Current Target or CT register bit state to change at each Transfer Complete or TC. But on tx DMA stream it changes CT, one sample before TC. Why? But in...

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