STM32U0 is the first Cortex-M0+ with a static consumption of only 160 nA in standby mode with RTC (Real-Time Clock) and 16 nA in shutdown. It also achieves 118 points in CoreMark and targets SESIP level 3 and PSA level 1 focusing on firmware code pro...
The new STM32H7R/S lines are built on the success of the STM32H7 series, offering even higher performance and security at a lower cost. The STM32H7R/S is a bootflash-based MCU powered by a Cortex®-M7 core running up to 600 MHz, with 64 KB of user fla...
Posted on August 01, 2016 at 16:02 Overall objective: Using https://github.com/groupgets/purethermal1-firmware as a base, add a USB serial port interface (which would replace the DEBUG functionality it has currently). I have read thro...
Recently working with spi communication in stm32g070rb using stm32CubeIDE (HAL library).SPI master receive interrupt triggered continuosly when there is no interrupt.But same code wrote in SPI slave its works perfectly.I also put Pull down resistor.P...
Hello,I met a HAL_Delay() block. The board worked with internal RCC, and I checked the uwTickFreq when debugging, it always equal to 0. Attached the ioc file.
Running into a weird issue with my teams and I's capstone senior project. We are using the Nucleo dev boards and connecting it to IMU in the title via I2C. When running either HAL_I2C_Mem_Read or HAL_I2C_IsDeviceReady the status we get back is HAL_ER...
Hi, I am working on the NUCLEO-G491RE development board with 170MHz HSE and testing UART communication with 1mbps baud with HAL_UART_Transmit_DMA and HAL_UART_TxCpltCallback on STM32CubeIDE but only able to send around first 256 bytes and the remaini...
->MDMA is configured STM32H757 Eval to transfer 32000 bytes of data using repeat block transfer triggering Mode.-> I want to have interrupt on each Block Transfer, but I'm getting interrupt when last Block is transferred as BRC is set to Zero-> Even ...
I am using STM32L083 and need to erase it using J-Link. If it is locked at Level1, I also need to unlock it. My goal is to completely erase the entire Flash memory. I believe I have an error in the process, as I have been unsuccessful in both erasing...
According to the STM32H7's datasheet, the M4 core shouldn't be able to boot from an SDRAM memory address (because it's outside of the range 0x00000000 to 0x3FFF0000):However, I found out that I can actually boot the M4 core from SDRAM, if I used the ...
Struggling to get my own STM32U5A5 board working... the USB HS PHY was not working, until... (see below).I was confused also with this thread:https://community.st.com/t5/stm32-mcus-products/stm32u5-and-usb-hs/td-p/571774This told me actually as well:...
Hello,I've two STM32G473 controllers connected on SPI3 and SPI5 of main controller (STM32H753).1. STM32G473 - Boot, Chip Select and Reset pins are controlled through the I/O pins of STM32H753, SPI5 of H753 is used to interface G473 on SPI1(as per not...