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Hi,I would like to get some clarification on the maximum STM32G4 ADC clock frequency. In the STM32G473xB datasheet (DS12712 Rev 2), on page 138 it shows a max fADC of 60 MHz for Range 1, single ADC operation. What exactly is meant by "single ADC oper...
Hi. I confused about deep sleep on ST's Cortex M4 processor. As I understand If I use HSE as an system clock and go to deep sleep, HSE will turn off. And in wake up ST's document says HSI is used as system clock source after wake up from STOP and Sta...
I want declare a uint32_t variable which will be updated/written by one of the cores and read by another core. Any sample code (or document) available for Arm Cortex-M4 and Cortex-M7 cores?
Hello,I recently bought Nucleo F334R8 which is an ARM 32-bit Cortex M4 microcontroller with both ST and Arduino connectors.I would like to ask about the accuracy of any data from sensor interfacing.The microcontroller is said to have 32 bit accuracy ...
I need to use STM32G070 Timer 17 output compare channel as one pulse PWM1 mode to produce delay and pulse duration at GPIO output pin (this is working!) AND also an interrupt/event at the end when ARR value has been reached (this is not working). Is ...
E.g. RM0351 Rev 6 tells for UART/CR2 / ADDR:" This bit field can only be written when reception is disabled (RE = 0) or the USART is disabled (UE=0)"However it seems thaT RE = 0 is not sufficient. Only with UE = 0, a new address may be written.(gdb...
Hi Colleagues,I am just trying STM32F103 using Encoder in TIM3. I am able to count the pulses and direction ; prima facie it looks fine.I am using the STM32 CubeIDE for configuring the parameters. I have a few questions though :1) I need to compute t...
I am learning bare-metal programming on STM32F411RE (Nucleo board). I am trying to implement a SPI driver.Reference manualEven though I have set the Data Frame Format to 8-bit, My SCK consists of 16 clock cycles. Sending 8 bit data on this has weird ...
MCU is STM32H743ZI. When QUADSPI working in AutoPolling mode,Setting the ABORT bit in the QUADSPI_CR, Why SR.BUSY bit stall high? BUSY don't goes low forever!But according to referrence manual,"In automatic-polling mode, BUSY goes low only after the ...
What kind of reason would the DR register read the same on subsequent calls in release build?If I don't add __NOP()'s in there, the registers read the same and the FIFO doesn't get emptied.Micro is STM32F769NIstatic uint32_t drvInit(void) { uint32...
