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HI~~I test camera STM32H743.When I enable D cache((SCB_EnableDCache ())),camera image breaking phenomenon.When I disable D cache((SCB_EnableDCache ())),it is working well.=======================================================================int ma...
Hi ST community,I am trying to read the CPUID of STM32F107 using the following code snippet. But the problem is each time I power cycle it, I am reading a different CPUID. I am reading CPUID from address location UID_BASE_ADDRESS(0x1FFFF7E8) for STM3...
Hi all!,I'm, triyng to program using CMSIS in order to learn how registers works.If I use the SystemClock_Config() generated by STM32CubeIDE all works properly, but if I use my own rutine, the TFT wired to SPI3 dont show the fonts properly (I think i...
Thank you in advance for this program file and for the answer.best regardsAndrzej Danielewicz
I have configured STM32h743ZI with below Settings: ADC1 with trigger set to tim1 update event DMA to transfer from ADC to memory Disabled continuous conversionProblem:I want the ADC to sample every 50us (TIM1 configured to 50us)but convers...
Hi, I want to achieve the title's behaviour to communicate with multiple SPI sensors in the 5 SPI buses at the highest possible throughput and minimal CPU load. I first tried the following with 1 bus.void cpltCB(void); uint8_t RXBUFF[8]; void main(...
Hi everyone,I have a question regarding the STM32F7 family, more specifically the STM32F756BGT6: what is the GPIO state when it's held under reset, i.e. the NRST pin is held LOW? Are the GPIOs in high impedance state or input with pull-up or somethin...
Hi,I need to calculate DSP speed for STM32F407, but I can't find ARM documentation on DSP extension of Cortex-M4 nor any documentation of DSP extension implementation in STM32F4.I know that Cortex-M4 have pipeline with 3 stage + branch speculation.So...