We have PCB assemblies built that contain STM324L7 with 1M and 2M flash memory. How can we determine the flash memory size using a JTAG connection (e.g. by reading a register value)?
Does anyone know if its possible to have a dedicated area memory of the Cortex to load dynamic functions during runtime? Something like an external C compiled function and send the binary through a communication interface (serial,i2c,etc) to the Micr...
I need to store a two-dimension array (uint16_t array[100][15]) in flash for power loss reservation, But since my application is big enough and my internal flash is already running out (85%), It seems to be applicable to store my array in external no...
I am trying to use DAC Channel 1 on STM32H7 with DMA to control the ramp-up of a PA. The DAC must always be driven (enabled). A ramp-up sequence is written at the start of a burst and a ramp-down at the end of the burst.The FIFO error flag is set on ...
Hi all,Thanks in advance for your time, appreciate it!!My doubt is over the microcontroller STM32H743ZI. It has 3 ADC modules integrated. As far as I understand, each module has a Sample and Hold, thus ADCs 1 and 2 can be coupled in order to work in ...
The information for System Handler Priority Registers if false according to ARMv6-M Architecture Reference Manual issue C
Hi,I am using STM32L151RCT6 MCU and creating the project in STM32cube IDE .i implemented DAC peripheral and kept 1.52 As input and did calculation like:float value = 1.52; // Dac outputuint32_t var; var = (value * 4096)/3.3 ; // From datasheet HA...
Dear Sir/madam,We are using Serial RTC chip(M41T93ZMY6F) in one of our application. In the datasheet,it is given as the RTC chip can be operated in the range of -40 deg C to +85 deg C.During Low temperature (-10 deg C), vacuum condition (5*10^-5 bar)...
Offset values shown in Table 84 are out of range according to Table 1.Also, "Address offset" of each COMP registers is different from the table.Section 10.1 says that the assignment of DMAMUX request multiplexer outputs to DMA controller channels is ...
