I have a CAN bus between STM32H745 and STM32F042 processors using Standard CAN for communicating. The transfer, receive just works fine for any packet other than the following: I cannot explain it. The data byte starts with 0xd2 0x01, STM32H7 does no...
We are using the stm32f205rgt6tr. At present they are not available. We are looking at using the stm32f205re or rf as a replacement, but the memory map in the reference manual and flash programmer manual only have the map for the rg.
I can setup dual-core flashing in the IDE, but I don't think my algorithm for flashing on STLINK v3. How do I do this, where is info?
My platform is STM32H735G-DK and I am trying to test access tothe MX25LM51245G Octo SPI flash. I am using the BSP_OSPI_NOR API that comes with the STM32CubeH7_SDK (version 1.8.0)Test steps:1. At boot, initialize the controller and configure it for me...
Hello everyone,I am trying to replace a simple code in C inside a STM32H7 that goes like this:function(0, &array[0]); function(1, &array[1]); function(2, &array[2]); function(3, &array[3]); function(4, &array[4]);withenum_variable_t index ; ...
Hi, I'm using USART2 in DMA mode. But i'm receving data was incorrect alignment. (i.e) Data last byte was get in my first byte of data. I don't know why its happen. I'm enabled I & D-Cache memory also and the DMA buffer was stored in in RAM_D2(0x30...
Hello everyoneI want to know if I can set the two can interface in slave and recieve messages ,I have could get message from one or another setting the index of filter ,but I need listen both at the same time :(.Any idea ? or is the any hw limitation...
Hello, I am checking the Flash size and memory map of STM32F303REHowever, I noticed the address of Flash memory is from 0x0800 0000 to 0x0804 0000.It means only about 262K address line, but the STM32F303RE's Flash is 512K.How does it arrange the size...
Refer the url https://www.cnx-software.com/2020/03/22/how-to-detect-stm32-fakes/ for details.Advance Thanks,
Conversion of ADC1 and first channel of ADC2 will finish theoretically at the same time.
