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Synchronized PWM outputs with offset?

Is it possible in the STM32 world to have two synchronized PWM - but with an offset separating the outputs?Here's the problem in picture form:Both the blue and red traces are the same frequency and duty cycle, but in this case trace red is offset 50 ...

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DPaul.2 by Associate II
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Resolved! Does STM32H743 Errata 2.16.2 apply to revision V silicon?

STM32H743Does errata 2.16.2 "Wrong data may be read from Message RAM by the CPUwhen using two FDCANs" apply to silicon revision V?The errata indicates it does, but previous discussion by Imen Dahmen indicates the issue was corrected. I need a confirm...

MBC by Associate III
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  • 2 replies
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Timer Interrupt with DMA (ADC, SPI), non-blocking while loop?

Hi, ​I always appreciate all members here for helping beginners like me :)​I am currently working on a project using Timer and ADC+SPI with DMA.​The main timer loop is running at 40kHz, and this frequency should be strictly guaranteed.Two DMA process...

0693W00000JMUXKQA5.png 0693W00000JMUZVQA5.png
IJo.1 by Associate III
  • 1981 Views
  • 7 replies
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Resolved! STM32H7B3I-DK ADC Control register(ADC_CR) BOOST bits

I'm checking the ADC operation with STM32H7B3I-DK board.​To set adc clock frequency up to 50MHz​, i tried to change BOOST bits of ADC_CR register.​However, unlike the rm0455 document that states that bits 8 and 9 (BOOST bits region) can be set, when ...

SPark.28 by Associate II
  • 2016 Views
  • 5 replies
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Delay generator based on STM32F429

HelloI am trying to delay a 1Hz digital signal.I would like to generate a delay varying from a few microseconds to 10 ms.I tried to use ETR, TI1_ED and PWM input but I didn't manage to found out how to do.Does anyone has an idea on how to proceed?Bes...

stm32F103 ibis model error!

Error :Messages for model XXXX:Vmeas_(rising/falling) is set,It is necessary for delay neasurements. satisfy Vinh >= Vinl.

sjian by Associate
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  • 3 replies
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