STM32F7 data corruption when using SPI with DMA in SRAM1 instead of DTCM
Hi,From the errata sheet I have seen, that the STM32F7x2 has a problem with the cache in write through:Errata:https://www.st.com/resource/en/errata_sheet/es0360-stm32f72xxx-and-stm32f73xxx-device-limitations-stmicroelectronics.pdfDatasheet:https://ww...