Using Segger Jlink pins as GPIO's

[EKosa.1]

I am developing a project that has M7 processor. I want to use Segger Jlink pin which is JDTI as GPIO.

I want to keep it low until I set it. But, while flashing the code to my MCU, JDTI pin becomes high until passing the hal_initialize() function. So my corresponding hardware in JDTI pin powers itself due to pins setting itself situation while flashing the code. After passing hal_initialize() function it becomes low as expected and I can set and use it as GPIO pin.

So, is there any way to keep this pin low while flashing the code to my MCU.

Preferably, I want to solve this situation by software. It may need a hardware development too. If it is, please share your idea and lets discuss it. Any idea will be appreciated.

[Uwe Bonnes]

JTDI has an internal pull up, enabled by default even in reset. You need a stronger external pull-down to keep JTDI low during reset.

[EKosa.1]

Can you share a documantation about this information?

https://www.segger.com/doc/UM20005_Linker.html

Probably there is but I cant found it.

[Uwe Bonnes]

E.g. in RM0399, 63.4.1 Serial-wire and JTAG debug port (SWJ-DP):

"By default, the JTAG-DP is selected on system or power-on reset. The five IOs are

configured by hardware in debug alternative function mode. The SWJ-DP incorporates pull-up resistors on the JTDI, JTMS/SWDIO, and nJTRST lines, as well as a pull-down resistoron the JTCK/SWCLK line."

[EKosa.1]

If I add a stronger external pull down resistor compared to internal pull-up, after setting the pin can I read high from after external resistor? If external resistor counters the reading high during flashing mcu, how can I read high when I set it in GPIO? Because Im gonna need that pin to set after flash. Eventually, will pull down resistor blocks my hardware pinned to JDTI for powering. From my understandings, that pull down resistor blocks reading high from it. Sorry, little bit confused here. My hardware knowledge may be not enough here.

[Uwe Bonnes]

Internal Pull-Up is is about 40 kOhm. Use external Pull down perhaps 5 kOhm. When you active drive the line with any sensible push-pull, the push-pull can drive that load.

[EKosa.1]

"Internal Pull-Up is is about 40 kOhm"

Can you please share the document that you found Pull-Up resistor value?

Consider that I found the correct resistor value for pull down. With push-pull configuration, will the pin be low while uploading the code?

[Uwe Bonnes]

Have a look in the appropriate datasheet for the values under I/O port characteristics. TDI is an input with internal pull-up. External pull down will override if value is appropriate. When MCU starts, remap TDI and use as normal GPIO output *** that will override the external pull.