Forum Posts
Resolved! STM32H745 FLASH does not store the data?
Hi,I write some data to the 0x080A0000 (sector 5 )address which is not protected. I write the data and ı can read that data too. There is no problem with that. But if I comment out the line which writes to data to the flash and run the program. That ...
When PWM output through TIM2 channel 1 on STM32G061G6U6 is enabled, the data register of ADC1 sometimes stores high values (~4095) even if there is no signal being fed to it.
Here is the configuration I use:int main(void) { HAL_Init(); SystemClock_Config(); MX_GPIO_Init(); MX_ADC1_Init(); MX_TIM2_Init(); // configure PWM __HAL_TIM_SET_AUTORELOAD(&htim2, 1000); __HAL_TIM_SET_COMPARE(&htim2, TIM_CHANNEL_1...
Why is not std::vector or std::unique_ptr using at stm32 projects with cpp?
Why is not std::vector or std::unique_ptr using at stm32 projects with cpp? When I examine stm32 projects that use cpp , I do not see modern cpp features.
SNMP Agent implemention
Hello,I want to implement the SNMP agent based on standalone, not based on os.I could have got a example code for snmp agent?Thank.
Resolved! Which manual/reference contains detailed register/function specification for (USART) peripherals found in STM32F0 series?
I need to configure one of the USART peripherals in STM32F0 series MCU without using HAL or Low-layer drivers. I plan to fully initialize and drive the USART peripheral registers directly from the application, including assigning the USART to the req...
Looking for configuration of wrap burst for OCTOSPI in memory mapped mode and ICACHE enabled.
The project I am refering to is using a stm32L562QE mcu with a W25Q32JV nor flash external memory OCTOSPI.W25Q64JV is running in Memory mapped mode otfdec is enabled. ICACHE is enabled with burst mode set to wrap.I am trying to configure the octospi ...
Resolved! Character match on STM32F303K8
Hello,I'm trying to set up the character match interrupt to detect the character '\n' (which indicates the end of a packet) and I don't manage to get the interruption.The procedure I'm using is:initialize the uart, its gpios, and the dma.enable the u...
STM32F7 data corruption when using SPI with DMA in SRAM1 instead of DTCM
Hi,From the errata sheet I have seen, that the STM32F7x2 has a problem with the cache in write through:Errata:https://www.st.com/resource/en/errata_sheet/es0360-stm32f72xxx-and-stm32f73xxx-device-limitations-stmicroelectronics.pdfDatasheet:https://ww...
