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I'm using the Nucleo STM32G474RTE board and the LL drivers for DMA, GPIO and HRTIM and the CUBEMX in the IDE. My goal here is to drive a full H-Bridge with 4 PWM signals having the needed deadband and duty cycle control.Using the LL libraries and CUB...
Hello,I am working with STM32H743BI and trying to write then read a QSPI FLASH "mt25qu01gbbb". I first use the STM32 software example "QSPI_ReadWrite_IT" (adapted with cube configuration) to start discovering QSPI on my hardware. Then I made a small ...
Hello everyone, Can I in any way force disconnection from peripheral device?I’m using BlueNRG-LP MCU and BLE Stack APIs. I want to force a disconnection with the central from my peripherals. Is it possible with BLE?I would like to avoid a reset softw...
hi, I am trying to implement QSPI in STM32H743 with S25FL512. REad ID function work properly, showing correct data like command 0x9Fresult: {01}{02}{20}{4D}{00}{80} memory size 65Mbytebut the BSP_QSPI_READ/WRITE function not correct data, some one gu...
I have worked with several STM32 Nucleo and Discovery Boards. My typical starting point is to print "Hello World" and blink an LED with from a HAL project. The HAL/IOC part is working as expected. I am thinking I am missing some dual-core hardware ...
Hello, I would like to connect Gbit SDRAM to STM32F429 MCU. When I look at the STM32 FMC memory map, it has two 256 Mbytes area for SDRAM. As far as I understand, I can connect up to 4 Gbit SDRAM. However, SDRAMs have maximum 512 Mbit size. 1) Is it ...
My board is supposed to act like a PM-bus server on top of a ATX-PSU and I need to 'time' the sequence, that powers up the PSU. I have tried to use 'tx_thread_sleep()' and even changed tx_user.h : #define TX_TIMER_TICKS_PER_SECOND --> 1000 an...
I try to use TIM_DMABurst to generate exact number of pwm pulses.But I found after call HAL_TIM_DMABurst_WriteStart and HAL_TIM_PWM_Start, it enter HAL_TIM_PeriodElapsedCallback. And then if I call HAL_TIM_PWM_Stop it will stop and generate no pwm. I...
Hi all,in the STM32CubeProgrammer section Option bytes (OB) there's one group called "user configuration". This group list the two checkboxes BCM4 and BCM7 to enable/disable booting each core. I assume that there are two bits in some R/W configuratio...
