/*CODE to generate PWM signal of 50%*/#include "stm32l476xx.h"#include "pwm.h"void pwm_init(void){ /*RCC configuration*/ RCC->AHB2ENR|=RCC_AHB2ENR_GPIOEEN;//ENABLE GPIOE RCC->APB2ENR|=RCC_APB2ENR_TIM1EN;// ENABLE CLOCK ACCESS TO TIM1 //RCC->APB1ENR1|...
Hello,I'm working on 2 NUCLEO-F767ZI Demo Board.I'm using STM32CubeMX with last firmware package to generate the code and STM32CubeIDE to modify it and debug it.One of the board is used as an I2C Master, the other as I2C Slave. Every thing work fine ...
Here is my code in main() to config field NRST_MODE: HAL_FLASH_Unlock(); HAL_FLASH_OB_Unlock(); gFlashOBST.OptionType = OPTIONBYTE_USER; gFlashOBST.USERType = OB_USER_NRST_MODE; gFlashOBST.USERConfig = FLASH_OPTR_NRST_MODE_1; HAL_FLASHEx_OBProgram(&...
I was finally able to find the correct settings to configure my CAN peripherals with correct bitrate after tweaking for a while in STM32CubeMX. The settings that work do not make sense. FDCAN2 is 4 times slower so I had to make clock divider for FDCA...
Hi everyone, I'm just trying to test and verify some clock frequencies for a PWM waveform are correct. I used CubeMX to generate some code that has set the clock frequency of the MCU to 72 mHz and I am trying to achieve a 20 kHz PWM frequency. I enab...
As per RM0468, STM32H72x and STM32H73x chips have 192 KB of SRAM in the D1 domain that is 'sharable' between ITCM and AXI SRAM, ie. it can be allocated as ITCM or AXI SRAM with 64KB granularity,It is known that SRAMs in D1 (or any other domain for th...
Working on a STM32L151RC6, I'm not clear what TIMx_IN1, TIMx_IN2, TIMx_IN3 and TIMx_IN3 are (datasheet, alternate function 14, CPRI).Belongs to Analog Comparators or Timers?As far as I figured out, if I select AFIO14, the GPIO pad will be connected t...
Hardware 1: STM32F767ZGT6 with LSE Crystal Model: CM9V-T1A-32.768KHZ-7PF-20PPM-TA-QC Maker: Micro Crystal AG Hardware 2: STM32F767IIT6 with LSE Crystal Model: ECS-.327-12.5-12R-C-TR Maker: ECS IncCompiler: IAR Workbench v8.32.1Driver: STM32Cube_FW_...