STM32 MCUs Products

Bug in STM32CubeIDE, Version: 1.10.1, Build: 12716_20220707_0928 (UTC), regarding IRQ on DMA transfers with STM32F401

I have a small project which should generate an interrupt whenever a DMA transfer has completed. If I build the code for an STM32F411 then it works exactly as expected. If I build that same code for an STM32F401, which is within the same family as ...

Hi There, I have the SMBUS example code for STM32L4R5ZI-Nucleo. As per the spec this code should be fully compatible with STM32L496z-Nucleo. However, when I flash the example FW from STM32L4R to STM32L496 the SMBUS functionality does not work.

STM32F070 Standby Mode (Not waking up...)

I wanted to test the wakup pin on the stm32f070f6.I have set pin PA0 to SYS_WAKUP1 and gave it the user name "WAKE". Before the user while loop I call: HAL_PWR_EnableWakeUpPin(WAKE_Pin); HAL_PWR_EnterSTANDBYMode();To enable wakeup (I thought) and put...

STM32H723 FDCAN1 AT CLASSIC MODE Not Working

FDCAN1 Settings:FDCAN_FRAME_CLASSIC;FDCAN_MODE_NORMAL;FDCAN_EXTENDED_ID;FDCAN_FILTER_MASK;TX/RX FIFO Enabled.Call Functions In sequency:MX_FDCAN1_Init(); hfdcan1.Init.NominalPrescaler = 5; hfdcan1.Init.NominalSyncJumpWidth = 3; hfdcan1.Init.NominalTi...

The match interrupt on LPTIMx->CCRx is triggered when LPTIMx->CNT > LPTIM->CCRx - not on equal (=) as one might expect

On the STM32U5xx, ST decided to keep this interpretation of "match". It is present on other chips as well, see https://community.st.com/s/question/0D53W000004J0srSAC/stm32l0-lptim-generating-random-compare-match-interrupt-when-changing-compare-match-...

Dear Team STM32F437IIH6TR about this part,could you help me to provide the ECCN/CCATS FILE? We bought a batch of the goods, but the customs asked us to provide ECCN or CCATS documents before we could enter

CCATS copy of licensable item

Resolved! STM32L031G6

I have a STM32L031G6 component in a UFQPN28 package, can I install a 3.68MHZ crystal, will it work or only in a UFQPN48 package

In theory, you can use all 26 bit of the STM32U MDF in the CIC stage. In practice, I recommend to stay < 25 bit to avoid artifacts and saturation.

Interruption, but corresponding interrupt flag is not set?

Dear community,I am having a strange problem with the STM32L431.The ADC is set up for use with both the DMA and interruption. This is to de-interleave the adc results from 2 different channels, since there was problem with interleaved ADC results whe...