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Hello community,I've been trying to implement the dual bank boot on my L476RG and run the app on the bank 2 after reset by setting the option byte BFB2 to 1 and it didn't work. Tried a lot of things and specially setting SCB->VTOR = 0x08000000 in the...
I have4 set up a 9 channel DMA adcBelow is the DMA configuration in the IDEThis is the ADC configurationThis is the IRQ routineThis is where I treat the data. For every loop it gets added to another array after the conversion.Then a simple routine t...
Hello, this is a general question for my understanding.when I single stepped* through my SPI code, I encountered some unexpected behavior. But when I run over the code, it worked as expected.*During this time, I had the peripheral SPI view opened.So ...
Select PA1 as TIM2 CH2, those code are copy from ST official example(TIM21), and changed to TIM2.no output from PA1, code as below:void ConfigureTIM2AsPWM_EdgeAligned(void){/* (1) Enable the peripheral clock of Timer x *//* (2) Enable the peripheral ...
We are currently developing a new product using STM32H723VGT6 (LQFP100 package).We purchased 10 pieces, and during initial board bring-up, we are observing that several chips from the same lot are unable to communicate via SWD (Device ID read failure...
I've just brought the stm32h573i-dk dev board and what to become familiar with Threadx and USBx. I have a uni project coming up that I would like to use the board as a msc device but struggling to get the board to enumerate with the PC. I have tried ...
What is the correct way to read high cycle flash data.When i read address 0x916800 i get a Hard fault. Clearing and writing the this address works fine.With reading i have a problem. bank 2 has EDATA enabled for the last 2 pages. Can you give me a co...
Hello,I’m currently working on integrating the HX711 load cell amplifier with my NUCLEO-F767ZI development board. However, I’m having some difficulty determining which GPIO pins to use for the SCK (clock) and DT (data) lines.As I’m relatively new to ...
The TI motor drivers mct8329a and mct8316 require 100us delay between i2c data bytes. This can't include the acknowledge bit, but requires holding down the clock between transfers for the 100us. it is due to a bug in the TI chips that can't stretch c...
