Resolved! STM32H573V ETH_DMAMR.SWR stuck
I have designed a board with a STM32H573 and a KSZ8081RNACA PHY. As soon as I enable ETH clocks the ETH_DMAMR:SWR bit gets set.Verified:1. The 50 MHz clock from the PHY is present and stable (oscilloscope) at PA12. GPIO PA1 is configured for AF11, NO...