Hello,
I found some discrepancy in BOR configuration for STM32U083CCT6 processor between reference manual [1] and HAL implementation [2]. It concerns BOR_LEV[0:2] bits (bits 10:8) in FLASH_OPTR register. The RM [1] talks of four levels (000: 1.7 V, 001: 2.0 V, 010: 2.2 V, 011: 2.5 V, 100: 2.8 V), in HAL [2] bit 8 is used to enable BOR (OB_BOR_ENABLE in stm32u0xx_hal_flash.h, FLASH_OPTR_BOR_EN in stm32u083xx.h), and the next bits (the remaining two) are used to set the level, importantly, the RISING one (00: 2.1 V, 01: 2.3 V, 10: 2.6 V, 11: 2.9 V), and the next two bits (12:11, which are described in the RM as reserved) are used to set the reaction of the BOR circuit to the falling voltage (00: 2.0 V, 01: 2.2 V, 10: 2.5 V, 11: 2.8 V). So the implementation in HAL is wider (based on 5 bits) and seems more advanced than the one given in the RM. I will add that the erratum [3] is silent on this topic.
So, the question is which BOR settings in the STM32U083 processor are correct?
[1] RM0503, Rev 2 (26-Mar-2024), Reference manual, STM32U0 series advanced Arm®-based 32-bit MCUs
[2] STM32CubeU0 Firmware Package V1.2.0 / 30-October-2024
[3] ES0602, Rev 3 (February 2024), Errata sheet, STM32U073xx and STM32U083xx device errata
